Patents by Inventor Xiaodan Zou
Xiaodan Zou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10274986Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.Type: GrantFiled: September 22, 2017Date of Patent: April 30, 2019Assignee: QUALCOMM IncorporatedInventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Hua Guan, Kan Li
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Publication number: 20180284830Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.Type: ApplicationFiled: September 22, 2017Publication date: October 4, 2018Inventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Hua Guan, Kan Li
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Publication number: 20180107232Abstract: Certain aspects of the present disclosure generally relate a dual feedback loop regulator. For example, the regulator may include a first amplifier having an output coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator. A first input of a second amplifier may be coupled to the first feedback path and a second input of the second amplifier may be coupled to a reference path. The regulator may also include a transconductance stage having a first transistor and a first current source, the first transistor and the current source coupled to the first feedback path and the second feedback path, and a transimpedance stage coupled to the transconductance stage and an input of the first amplifier.Type: ApplicationFiled: October 18, 2016Publication date: April 19, 2018Inventors: Chi Fan YUNG, Xiaodan ZOU, Ngai Yeung HO, Kan LI, Hua GUAN
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Patent number: 9946283Abstract: Certain aspects of the present disclosure generally relate a dual feedback loop regulator. For example, the regulator may include a first amplifier having an output coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator. A first input of a second amplifier may be coupled to the first feedback path and a second input of the second amplifier may be coupled to a reference path. The regulator may also include a transconductance stage having a first transistor and a first current source, the first transistor and the current source coupled to the first feedback path and the second feedback path, and a transimpedance stage coupled to the transconductance stage and an input of the first amplifier.Type: GrantFiled: October 18, 2016Date of Patent: April 17, 2018Assignee: Qualcomm IncorporatedInventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Kan Li, Hua Guan
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Patent number: 8981985Abstract: An analog-to-digital converter (ADC) for a multi-channel signal acquisition system, a signal acquisition system, a method of generating a digital output code from an analog input signal, and a method of converting a plurality of analog signals to a digital signal are provided. The ADC comprises a sample-and-hold (S/H) circuit operable to receive an analog input signal for each input channel; a digital-to-analog converter (DAC) common to all input channels; a comparator for each input channel configured to receive an output signal from the S/H circuit of the respective input channel, and an output signal from the DAC, for generating a comparison result of the two signals at each conversion cycle of the comparator; and a successive approximation register (SAR) common to all input channels and configured to generate, for each input channel, a digital output code based on the comparison results received from the respective comparator.Type: GrantFiled: September 6, 2012Date of Patent: March 17, 2015Assignee: National University of SingaporeInventors: Yong Lian, Wen-sin Liew, Xiaodan Zou
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Publication number: 20140232582Abstract: An analog-to-digital converter (ADC) for a multi-channel signal acquisition system, a signal acquisition system, a method of generating a digital output code from an analog input signal, and a method of converting a plurality of analog signals to a digital signal are provided. The ADC comprises a sample-and-hold (S/H) circuit operable to receive an analog input signal for each input channel; a digital-to-analog converter (DAC) common to all input channels; a comparator for each input channel configured to receive an output signal from the S/H circuit of the respective input channel, and an output signal from the DAC, for generating a comparison result of the two signals at each conversion cycle of the comparator; and a successive approximation register (SAR) common to all input channels and configured to generate, for each input channel, a digital output code based on the comparison results received from the respective comparator.Type: ApplicationFiled: September 6, 2012Publication date: August 21, 2014Applicant: NATIONAL UNIVERSITY OF SINGAPOREInventors: Yong Lian, Wen-sin Liew, Xiaodan Zou
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Patent number: 8742963Abstract: A recording circuit is provided. The recording circuit includes a multiplexing circuit configured to receive a plurality of input signals and to produce a multiplexed output signal including the plurality of input signals, and a plurality of sampling circuits electrically coupled in parallel to each other, each sampling circuit being configured to sample a portion of the multiplexed output signal corresponding to an input signal of the plurality of input signals and the sampling circuits configured to alternately produce an output signal corresponding to the sampled portion.Type: GrantFiled: September 6, 2012Date of Patent: June 3, 2014Assignee: Agency for Science, Technology and ResearchInventors: Xiaodan Zou, Jia Hao Cheong, Lei Yao, Minkyu Je
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Publication number: 20130063290Abstract: A recording circuit is provided. The recording circuit includes a multiplexing circuit configured to receive a plurality of input signals and to produce a multiplexed output signal including the plurality of input signals, and a plurality of sampling circuits electrically coupled in parallel to each other, each sampling circuit being configured to sample a portion of the multiplexed output signal corresponding to an input signal of the plurality of input signals and the sampling circuits configured to alternately produce an output signal corresponding to the sampled portion.Type: ApplicationFiled: September 6, 2012Publication date: March 14, 2013Inventors: Xiaodan ZOU, Jia Hao Cheong, Lei Yao, Minkyu Je
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Publication number: 20130027118Abstract: The present disclosure relates to structure of a capacitive touch panel and further relates to its manufacturing method. The structure comprises of sensing electrodes and peripheral circuits, wherein each sensing electrode comprises of a plurality of conductive units and a plurality of conductive wires for connecting the conductive units, wherein the conductive wires and peripheral circuits are made of a photosensitive material having an electrically conductive property.Type: ApplicationFiled: February 17, 2012Publication date: January 31, 2013Inventors: KWAN-SIN HO, Yanjun Xie, Xiaodan Zou
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Patent number: 8344810Abstract: A CMOS amplifier with integrated tunable band-pass function, a tunable active resistor structure, a method of amplifying an input signal and a method of fabricating an amplifier. The tunable active resistor structure comprises two symmetrically cross-coupled transistors.Type: GrantFiled: June 11, 2009Date of Patent: January 1, 2013Assignee: National University of SingaporeInventors: Yong Lian, Libin Yao, Xiaoyuan Xu, Xiaodan Zou
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Publication number: 20110140785Abstract: A CMOS amplifier with integrated tunable band-pass function, a tunable active resistor structure, a method of amplifying an input signal and a method of fabricating an amplifier. The tunable active resistor structure comprises two symmetrically cross-coupled transistors.Type: ApplicationFiled: June 11, 2009Publication date: June 16, 2011Inventors: Yong Lian, Libin Yao, Xiaoyuan Xu, Xiaodan Zou