Abstract: A system and method for proximate vehicle intention prediction for autonomous vehicles are disclosed. A particular embodiment is configured to: receive perception data associated with a host vehicle; extract features from the perception data to detect a proximate vehicle in the vicinity of the host vehicle; generate a trajectory of the detected proximate vehicle based on the perception data; use a trained intention prediction model to generate a predicted intention of the detected proximate vehicle based on the perception data and the trajectory of the detected proximate vehicle; use the predicted intention of the detected proximate vehicle to generate a predicted trajectory of the detected proximate vehicle; and output the predicted intention and predicted trajectory for the detected proximate vehicle to another subsystem.

Abstract: A vehicle position and velocity estimation system based on camera and LIDAR data is disclosed. An embodiment includes: receiving input object data from a subsystem of a vehicle, the input object data including image data from an image generating device and distance data from a distance measuring device, the distance measuring device comprising one or more LIDAR sensors; determining a first position of a proximate object near the vehicle from the image data; determining a second position of the proximate object from the distance data; correlating the first position and the second position by matching the first position of the proximate object detected in the image data with the second position of the same proximate object detected in the distance data; determining a three-dimensional (3D) position of the proximate object using the correlated first and second positions; and using the 3D position of the proximate object to navigate the vehicle.

Abstract: Disclosed is a photosensitive module (21), adapted to a camera module, comprising a photosensitive element (211), a light transmitting element (212) and an isolation adhesive layer (213), wherein the photosensitive element has a photosensitive region and a non-photosensitive region, the light transmitting element is arranged in a photosensitive path of the photosensitive element, and wherein the isolation adhesive layer is arranged in the non-photosensitive region and supports the light transmitting element, and the isolation adhesive layer is formed by means of photolithography.

Abstract: A camera module and a photosensitive assembly thereof, an electronic device, and a manufacturing method are provided. The photosensitive assembly includes a photosensitive chip having a photosensitive area and an electric connection area located around the photosensitive area, at least one resistance-capacitance device, a conducting element, an expanded wiring layer, and a molded base. The expanded wiring layer has a top surface and a bottom surface. The at least one resistance-capacitance device is electrically connected to the bottom surface of the expanded wiring layer. The conducting element extends between the bottom surface of the expanded wiring layer and the electric connection area of the photosensitive chip, so as to electrically connect the photosensitive chip to the expanded wiring layer by means of the conducting element. A light hole is formed in the expanded wiring layer, and the light hole corresponds to at least the photosensitive area of the photosensitive chip.

Abstract: An adjustable camera module and an assembly test method therefor. The assembly test method for the adjustable camera module comprises: measuring a static tilt amount between the optical lens sheet group and the photosensitive assembly by performing a defocus curve test on the adjustable camera module; analyzing a static adjusting electric quantity of each adjustment coil of an adjustment coil group according to the static tilt amount; and burning the static adjusting electric quantity required by each adjustment coil so as to reduce process requirements.

Abstract: An adjustable camera module and an assembly test method therefor. The assembly test method for the adjustable camera module comprises: measuring a static tilt amount between the optical lens sheet group and the photosensitive assembly by performing a defocus curve test on the adjustable camera module; analyzing a static adjusting electric quantity of each adjustment coil of an adjustment coil group according to the static tilt amount; and burning the static adjusting electric quantity required by each adjustment coil so as to reduce process requirements.

Abstract: The invention provides a manufacturing method of the TFT array substrate. Compared to existing 4M process, the invention changes the structural design of the semi-transmissive mask for the photoresist layer for patterning the source/drain metal layer and the semiconductor layer. The edge forms a reduced thickness edge portion, so that the edge of the photoresist layer is thinned, and thereby the width of the photoresist layer is easily reduced in subsequent processes, and the semiconductor layer at the edge of the metal wire structure is easily etched during dry etching, reducing the tailing problem of the active layer at edges of source/drain to achieve finer metal wire structure, and improve optical stability, electrical performance, aperture ratio, reliability, power consumption, and the overall performance of the TFT array substrate. The residual problem of amorphous and heavily doped silicon on source/drain edge in original process is solved or reduced.

Abstract: The invention provides a manufacturing method of the TFT array substrate. Compared to existing 4M process, the invention changes the structural design of the semi-transmissive mask for the photoresist layer for patterning the source/drain metal layer and the semiconductor layer. The edge forms a reduced thickness edge portion, so that the edge of the photoresist layer is thinned, and thereby the width of the photoresist layer is easily reduced in subsequent processes, and the semiconductor layer at the edge of the metal wire structure is easily etched during dry etching, reducing the tailing problem of the active layer at edges of source/drain to achieve finer metal wire structure, and improve optical stability, electrical performance, aperture ratio, reliability, power consumption, and the overall performance of the TFT array substrate. The residual problem of amorphous and heavily doped silicon on source/drain edge in original process is solved or reduced.

Abstract: A display panel includes a first metal layer and a second metal layer sequentially stacked. The first metal layer includes a plurality of first metal lines and first gaps arranged between the first metal lines. The second metal layer includes a plurality of second metal lines arranged in a spaced manner. The second metal lines have an extension direction that is identical to an extension direction of the first metal lines. The second metal lines and the first metal lines are arranged to stagger, in position, with respect to each other. The second metal lines have orthogonal projections on the first metal layer that are located in areas of the first gaps in order to prevent shorting between the second metal lines in a process of manufacturing the second metal lines. A method for manufacturing the display panel and a display device are also provided.

Abstract: Disclosed is a photosensitive module (21), adapted to a camera module, comprising a photosensitive element (211), a light transmitting element (212) and an isolation adhesive layer (213), wherein the photosensitive element has a photosensitive region and a non-photosensitive region, the light transmitting element is arranged in a photosensitive path of the photosensitive element, and wherein the isolation adhesive layer is arranged in the non-photosensitive region and supports the light transmitting element, and the isolation adhesive layer is formed by means of photolithography.

Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate, and a first conductive layer and a second conductive layer which are sequentially disposed on the base substrate, and at least two passivation layers are continuously arranged between the first conductive layer and the second conductive layer in a direction perpendicular to the base substrate.

Abstract: A display panel includes a first metal layer and a second metal layer sequentially stacked. The first metal layer includes a plurality of first metal lines and first gaps arranged between the first metal lines. The second metal layer includes a plurality of second metal lines arranged in a spaced manner. The second metal lines have an extension direction that is identical to an extension direction of the first metal lines. The second metal lines and the first metal lines are arranged to stagger, in position, with respect to each other. The second metal lines have orthogonal projections on the first metal layer that are located in areas of the first gaps in order to prevent shorting between the second metal lines in a process of manufacturing the second metal lines. A method for manufacturing the display panel and a display device are also provided.

Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate, and a first conductive layer and a second conductive layer which are sequentially disposed on the base substrate, and at least two passivation layers are continuously arranged between the first conductive layer and the second conductive layer in a direction perpendicular to the base substrate.

Abstract: The present invention provides a manufacturing method of an array substrate, comprising a step of forming insulation layers in a driving area and a display area of the array substrate, wherein thin film transistors are provided in both the display area and the driving area; the insulation layers are arranged between gate electrodes and active layers of the thin film transistors. A thickness of the insulation layer of the thin film transistor in the driving area is larger than a thickness of the insulation layer of the thin film transistor in the display area.

Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises a gate electrode layer, an active layer and a source-drain electrode layer that are disposed on a substrate. The substrate comprises a storage capacitance region thereon II. In the storage capacitance region II, projections of the gate electrode layer and the active layer on the substrate are at least partially overlapped, and projections of the active layer and the source-drain electrode layer on the substrate are at least partially overlapped. The array substrate can effectively increase the storage capacitance without increasing an area occupied by the storage capacitance region, which is advantageously to reduce a pixel area and increase PPI.

Abstract: An array substrate includes a carrier plate, a first heat dissipation layer, and a function layer sequentially stacked on each other. The function layer is arranged on one side facing a user. The function layer includes a plurality of drive devices, metal wires and connection sections arranged between the plurality of drive devices. The plurality of drive devices are formed with openings. The connection sections each have an end extending through the openings to connect with one of the drive devices and an opposite end extending across the metal wires to connect with an adjacent one of the drive devices. The first heat dissipation layer conducts heat from the metal wires, the plurality of drive devices, and the connection sections through the carrier plate for dissipation. A method for manufacturing the array substrate and a display device are also provided.

Abstract: The present invention provides a mask for manufacturing a TFT in a 4M production process and a TFT array manufacturing method of a 4M production process. For the mask for manufacturing a TFT in a 4M production process, in a TFT layout structure of the mask, a line pattern is provided adjacent to an outer edge of a TFT pattern to extend along the outer edge of the TFT pattern. The present invention also provides a corresponding TFT array manufacturing method of the 4M production process, which uses the mask of the present invention to serve as a mask for a second mask-based process. The mask for manufacturing a TFT in a 4M production process according to the present invention allows for achievement of an edge-thinned structure through variation of edge exposure of the mask so as to make plasma etching more easily performed on such a structure to thereby reduce residues of amorphous silicon and heavily-doped silicon on an edge of a second metal layer.

Abstract: The present disclosure discloses in embodiments a thin film transistor and a manufacturing method thereof, an array substrate. The thin film transistor comprises: a base substrate, an active layer, a source, a gate, and a drain. Two ends of the active layer are connected to the source and the drain, respectively. The gate comprises a top gate and a bottom gate arranged opposite to each other in a direction perpendicular to the base substrate, the top gate comprising a top gate top portion and a top gate side portion connected to the top gate top portion, the top gate side portion extending from the top gate top portion towards the base substrate. The active layer is sandwiched between the top gate top portion and the bottom gate. A sidewall of the active layer is at least partially surrounded by the top gate side portion.

Abstract: The invention provides a TFT substrate and manufacturing method thereof. The TFT substrate comprises: base substrate, TFT layer, passivation layer and pixel electrode, stacked in above order; wherein the pixel electrode comprising: main electrode, and connection electrode connected to main electrode; the connection electrode connected to TFT layer through pixel electrode via; main electrode having a cross-like slit structure with branch electrode on four trunks of cross, and the connection electrode comprising a plurality of parallel stripe-shaped first branch electrodes, and a second branch electrode connected to the first branch electrodes; by disposing the first branch electrodes, the connection electrode having a shape similar to main electrode to make the main and connection electrodes having similar single slit diffraction when exposed to reduce or eliminate the photo-resist thickness difference in pixel electrode area in the 3M process to avoid display defect and improve yield rate.

Abstract: The present disclosure relates to a thin film transistor (TFT) array substrate and a manufacturing method thereof. The manufacturing method includes adopting a shading metal layer to form the bottom gate electrode, depositing a buffer layer on the substrate having the bottom gate electrode, applying a patterned process on the buffer layer to reduce the thickness of the buffer layer on the bottom gate electrode, applying the patterned process on the semiconductor layer to form the semiconductor pattern corresponding to the bottom gate electrode within the thin area of the buffer layer. The present disclosure may reduce a thickness of the buffer layer corresponding to the bottom gate electrode, so as to improve the whole performance of the array substrate caused by the bottom gate electrode.