Abstract: A touch substrate is provided, comprising a touch region.

Abstract: An etching adhesive tape for manufacturing a touch screen and a manufacturing method thereof, and an etching method are disclosed. The etching adhesive tape includes a base sheet and a functional layer disposed on the base sheet, the functional layer includes a first region corresponding to a region to be etched, and the first region includes an etching paste.

Abstract: The present invention provides a touch substrate comprising a plurality of capacitive touch driving electrodes extending in a row direction, a plurality of capacitive touch sensing electrodes extending in a column direction, a plurality of first pressure sensitive electrodes extending in the row direction and a plurality of second pressure sensitive electrodes extending in the column direction, the capacitive touch driving electrode and the capacitive touch sensing electrode are insulated from each other, the first pressure sensitive electrode is insulated from the capacitive touch sensing electrode and the capacitive touch driving electrode, the second pressure sensitive electrode is insulated from the capacitive touch sensing electrode and the capacitive touch driving electrode, when the touch substrate is touched, a voltage corresponding to a pressure at a touch position is generated between the first pressure sensitive electrode and the second pressure sensitive electrode corresponding to the touch positi

Abstract: The present invention provides a touch substrate, a manufacturing method thereof, and a display device. In the touch substrate of the present invention, first leads of a first-layer structure are connected with first patterns in a second-layer structure via first via holes, second leads of the first-layer structure are connected with second patterns in the second-layer structure via second via holes, and the first patterns and the second patterns produce mutual capacitance. Each first pattern comprises a plurality of branches radiating from the center to the circumference, each second pattern surrounds one first pattern in a mutually separated manner, and when the touch substrate is used for flexible display, the second patterns can cover the whole bent surface, so that when a user touches any place of the touch substrate, the touch substrate can quickly respond and blind spots cannot be formed.

Abstract: The present disclosure relates to the field of display technology, and provides a substrate, a method for manufacturing the same and a display device. The substrate includes a signal line and a GND line configured to remove static charges on the signal line.

Abstract: A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.

Abstract: The embodiments of the invention provide a metal grid, a touch screen, a display device and a manufacture method of touch screen, and refer to display technology field. The invention can improve the phenomenon of moiré fringe when the line width of the metal wire is relatively large. The metal grid comprises multiple repeat units, the metal wires in the repeat unit form at least two different kinds of basic patterns, and the repeat unit is pieced together by one or more of the at least two different kinds of basic patterns.

Abstract: A touch structure, touch screen and display device are disclosed. The touch structure comprises a plurality of first touch electrodes extending in a first direction and a plurality of second touch electrodes extending in a second direction, wherein the first touch electrodes and the second touch electrodes are intersected with each other, and each of the first touch electrodes comprises a metal wire part and a transparent electrode part, and/or each of the second touch electrodes comprises a metal wire part and a transparent electrode part. The touch structure according to the embodiments of the present invention can alleviate or even eliminate Moire fringe phenomenon, and thus improve display quality of a touch screen.

Abstract: System and method for decoding digital video data. The decoding system employs hardware accelerators that assist a core processor in performing selected decoding tasks. The hardware accelerators are configurable to support a plurality of existing and future encoding/decoding formats. The accelerators are configurable to support substantially any existing or future encoding/decoding formats that fall into the general class of DCT-based, entropy decoded, block-motion-compensated compression algorithms. The hardware accelerators illustratively comprise a programmable entropy decoder, an inverse quantization module, a inverse discrete cosine transform module, a pixel filter, a motion compensation module and a de-blocking filter. The hardware accelerators function in a decoding pipeline wherein at any given stage in the pipeline, while a given function is being performed on a given macroblock, the next macroblock in the data stream is being worked on by the previous function in the pipeline.

Abstract: A touch panel, a manufacturing method thereof and a display device are disclosed. The touch panel includes a first sensing layer (10) and a second sensing layer (11) which are superimposed.

Abstract: A touch substrate and manufacturing method thereof, and a touch display device are provided. The touch substrate includes: a substrate; a plurality of first electrodes alternatively arranged in a first direction of the substrate, a plurality of second electrodes alternatively arranged in a second direction of the substrate, and adjacent first electrodes are electrically interconnected in the adjacent areas; an isolating layer provided on the adjacent areas, and the isolating layer covering a portion of an area that is adjacent to the second electrode; and a bridge provided on the isolating layer. The bridge connects adjacent second electrodes; and the bridge includes an organic polymer conducting material. The performance of the touch substrate is improved effectively.

Abstract: System and method for decoding digital video data. The decoding system employs hardware accelerators that assist a core processor in performing selected decoding tasks. The hardware accelerators are configurable to support a plurality of existing and future encoding/decoding formats. The accelerators are configurable to support substantially any existing or future encoding/decoding formats that fall into the general class of DCT-based, entropy decoded, block-motion-compensated compression algorithms. The hardware accelerators illustratively comprise a programmable entropy decoder, an inverse quantization module, a inverse discrete cosine transform module, a pixel filter, a motion compensation module and a de-blocking filter. The hardware accelerators function in a decoding pipeline wherein at any given stage in the pipeline, while a given function is being performed on a given macroblock, the next macroblock in the data stream is being worked on by the previous function in the pipeline.

Abstract: A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.

Abstract: A system and method for decoding a digital video data stream. In one aspect, a plurality of hardware acceleration modules are used together with a core processor. The accelerators operate in a decoding pipeline wherein, in any given stage, each accelerator operates on a particular macroblock of video data. In the subsequent pipeline stage, each accelerator works on the next macroblock in the data stream, which was worked on by another one of the accelerators in the previous stage. The core processor polls all of the accelerators during each stage. When all accelerators finish their tasks for a given stage, the core processor initiates the next stage. In another aspect, two variable-length decoders are employed to simultaneously decode two macroblock rows of a video frame. Each variable-length decoder works to decode an assigned row and the rows are variable-length decoded in parallel.

Abstract: A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.

Abstract: The present invention provides an apparatus for performing inverse quantization for multiple decoding standards, where the functional operations that comprise the inverse quantizer are modularly implemented and can be selectably performed. Each operation can be represented via a table entry in an associated memory area, with the functional operation being performed via reference to that table entry. Functional operations can be bypassed as needed if inverse quantization does not need to be performed on a set of data. Certain other processing operations can be performed between steps as needed to accommodate different coding standards. Macroblock data can be read from and written back to a common storage area, or a direct path is provided for writing the data directly to a subsequent inverse transform device.

Abstract: Video decoding system having a programmable variable-length decoding accelerator. The system includes a decoder processor and a variable-length decoding accelerator. The variable-length decoding accelerator is coupled to the decoder processor and performs variable-length decoding operations on variable-length code in the video data stream. The variable-length decoding accelerator is capable of decoding variable-length code according to any of a plurality of decoding methods. In one embodiment, the variable-length decoder includes a plurality of code tables stored in memory and a code table selection register that is programmable to dictate which of the plurality of code tables is to be utilized to decode variable-length code. In one embodiment, the decoding system includes two variable-length decoding accelerators.

Abstract: A video and graphics system has a reduced memory mode in which video images are reduced in half in horizontal direction during decoding. The video and graphics system includes a video decoder for decoding MPEG-2 video data. The video images may not be downscaled in the horizontal direction when no bi-directionally predicted pictures are used. The video and graphics system may output an HDTV video while converting the HDTV video and providing as another output having an SDTV format or another HDTV format. The output having an SDTV format may be recorded using a video cassette recorder (VCR) while the HDTV video is being displayed.

Abstract: A method for processing video data includes performing by one or more processors and/or circuits in a video processing device, the one or more processors and/or circuits including a video scaler, a memory, and a scaler engine, functions including receiving a video image by the video processing device. The functions also include determining whether the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory or after reading the video image from the memory, and scaling the video image based on the determination. If the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory, performing by the one or more processors and/or circuits scaling of the video image in the video scaler using a video input clock of the video scaler to generate a first scaled video image.

Abstract: A graphics display system integrated circuit processes analog video input, digital video input, and graphics input. The system incorporates a graphics accelerator that includes memory for graphics data. The accelerator preferably includes a coprocessor for performing vector type operations on a plurality of components of one pixel of the graphics data. The accelerator also includes an expanded instruction set for storing and loading data.