Patents by Inventor Xiaofeng Guo

Xiaofeng Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220045690
    Abstract: Disclosed are an audio ADC for supporting voice wake-up and an electronic device. The audio ADC includes a programmable gain amplifier (PGA) having an input terminal for receiving an audio signal; a bypass switch having an input terminal for receiving an analog audio signal; and a successive approximation ADC having input terminals respectively connected to output terminals of the PGA and the bypass switch; the PGA gains and amplifies the audio signal, the bypass switch bypasses the PGA, and outputs the analog audio signal; the successive approximation performs analog-to-digital conversion with noise shaping on the analog audio signal after gain amplification at a first sampling rate/oversampling rate when the audio ADC is normal working, and turns off noise shaping when the audio ADC is sleep, performs analog-to-digital conversion on the analog audio signal output by the bypass switch at a second sampling rate/oversampling rate, and outputs to a DSP.
    Type: Application
    Filed: October 22, 2021
    Publication date: February 10, 2022
    Applicant: Radiawave Technologies Co., Ltd.
    Inventors: Erkan ALPMAN, Xiaofeng GUO, Jon Sweat DUSTER, Yulin TAN, Ning ZHANG, Haigang FENG
  • Publication number: 20210313997
    Abstract: Disclosed are an analog-to-digital converter error shaping circuit and a successive approximation analog-to-digital converter. The analog-to-digital converter error shaping circuit includes a decentralized capacitor array, a data weighted average module, a mismatch error shaping module, a control logic generation circuit, a digital filter and a decimator. The decentralized capacitor array includes two symmetrically arranged capacitor array units, each capacitor array unit includes a first sub-capacitor array of a high segment bit and a second sub-capacitor array of a low segment bit. The data weighted average module is configured to eliminate correlation between the first sub-capacitor array and an input signal, and the mismatch error shaping module is configured to eliminate correlation between the second sub-capacitor array and the input signal.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Erkan ALPMAN, Xiaofeng GUO, Jon Sweat DUSTER, Yulin TAN, Ning ZHANG, Haigang FENG
  • Publication number: 20210289783
    Abstract: A 5A5B6C tricyclic spironolactone derivative is provided with a formula XI: The present invention also relates to its preparation method and its applications in the areas of insecticide, nematicide, fungicide and anti-viral agent. The 5A5B6C tricyclic spironolactone derivatives in the present invention are high-performance, broad-spectrum, low-toxicity and low-ecological risk compounds with a wide range of applications in the areas of agriculture, horticulture, forestry and health.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 23, 2021
    Inventors: Zhijin Fan, Yujie Zhu, Lai Chen, Shuang Zhou, Xiaofeng Guo, Haixia Wang, Bin Yu, Nailou Zhang, Qifan Wu, Dongyan Yang, Bin Zhao
  • Publication number: 20210266004
    Abstract: A residue transfer loop, a successive approximation register analog-to-digital converter and a gain calibration method are disclosed. In particular, the residue transfer loop includes a sampling switch module, a logic controlling circuit, a residue holding capacitor module, a DAC capacitor array, a residue transfer module, a current rudder, a reset switch module and a charge sharing switch module. The logic controlling circuit sequentially outputs control signals according to preset time intervals in a preset period to control the reset switch module, the residue transfer module, the sampling switch module and the charge sharing switch module to work sequentially, thereby realizing a residue transfer.
    Type: Application
    Filed: May 12, 2021
    Publication date: August 26, 2021
    Inventors: Xiaofeng GUO, Erkan ALPMAN, Jon Sweat DUSTER, Haigang FENG, Ning ZHANG, Yulin TAN
  • Publication number: 20210250037
    Abstract: A reference voltage controlling circuit and an analog-to-digital converter are disclosed. The reference voltage controlling circuit includes a reference voltage generating circuit, a plurality of groups of sampling switching units and a logic controlling circuit. The DAC capacitor array switches the sampling switching units to a second positive reference voltage and a second negative reference voltage before starting sampling or conversion, and is charged and discharged with the second positive reference voltage and the second negative reference voltage to raise a voltage to a preset voltage. The sampling switching unit is switched to a first positive reference voltage and a first negative reference voltage to charge and discharge the DAC capacitor array to a target voltage. The rising of the voltage from the preset voltage to the target voltage is completed by the first positive reference voltage and the first negative reference voltage.
    Type: Application
    Filed: April 25, 2021
    Publication date: August 12, 2021
    Inventors: Xiaofeng GUO, Erkan ALPMAN, Jon Sweat DUSTER, Ning ZHANG, Yulin TAN, Haigang FENG
  • Publication number: 20210206241
    Abstract: A glass structure includes a glass body; a modulating unit coupled to the glass body to modulate optical characteristics of the glass structure; an interaction unit coupled to the glass body to provide an adjusting signal indicating an execution of adjusting the optical characteristics of the glass structure; and a control unit coupled to the modulating unit and the interaction unit respectively, the control unit being configured to receive the adjusting signal from the interaction unit and to control the modulating unit to modulate the optical characteristics of a target region of the glass structure in response to the adjusting signal. The interaction unit and the modulating unit are isolated from each other by a filling material having a transmittance equal to or greater than about 50%, a relative permittivity equal to or less than about 10, and a thickness equal to or greater than about 50 ?m.
    Type: Application
    Filed: September 25, 2019
    Publication date: July 8, 2021
    Inventors: Xiaofeng GUO, Siteng MA
  • Publication number: 20210146860
    Abstract: An exterior trimming part for a pillar of a vehicle, includes a bracket fixedly connected to the pillar, and a glass cover plate fixedly connected to the bracket and covering an exterior surface of the bracket. The bracket has a receiving space opened at least towards the glass cover plate. The exterior trimming part further includes an electronic component disposed at the receiving space. The exterior trimming part not only has good scratch resistance, but also has intelligent functions.
    Type: Application
    Filed: August 30, 2019
    Publication date: May 20, 2021
    Inventors: Jun TAN, Xiaofeng GUO, Michael LABROT
  • Publication number: 20210114263
    Abstract: A PVB film for HUD, a forming mold and a forming method thereof are presented. The accuracy error of HUD imaging achieved by the PVB film for HUD is ±0.1 mrad. The forming mold includes an upper mold and a lower mold, the two of which can form an enclosed mold cavity when clamped together, wherein protective films are disposed on inner surfaces of the upper mold and the lower mold, respectively, for supporting PVB material and preventing the PVB material from bonding with the upper mold and the lower mold, and wherein shapes of the protective films match shapes of the upper mold and the lower mold.
    Type: Application
    Filed: November 3, 2020
    Publication date: April 22, 2021
    Inventor: Xiaofeng GUO
  • Patent number: 10965304
    Abstract: The present application discloses an N-bit hybrid-structure analog-to-digital converter and an integrated circuit chip including the same, including a pre-stage sampling capacitor array, a post-stage capacitor array and a comparator set and the pre-stage sampling capacitor array including a number of 2N?1 sets of first capacitor array units arranged in parallel, the first capacitor array unit including two sets of parallel capacitor strings, input terminals of parallel capacitor strings respectively being connected to and switchable between differential analog signals and first preset reference signals, output terminals of the parallel capacitor strings respectively being connected to input terminals of the comparator set, input terminals of the post-stage capacitor array respectively being connected to and switchable between output terminals of the comparator set and differential analog signals, output terminals of the post-stage capacitor array being configured as an output terminal of the analog-to-digital
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 30, 2021
    Assignee: Radiawave Technologies Co., Ltd.
    Inventors: Xiaofeng Guo, Haigang Feng, Jon Sweat Duster, Ning Zhang, Yulin Tan
  • Patent number: 10906880
    Abstract: The present invention is that provided a synthesis method of a series of isothiazole oxime ether containing strobilurin derivatives IV. The present invention relates to 3,4-dichloroisothiazolyl oxime ether strobilurin derivatives, and their chemical structural formula is as shown by IV. The invention discloses the structural formula of the above compound, the synthesis method and the use as an insecticide, a fungicide, an anti-plant virus agent, and an agriculturally acceptable auxiliary or synergist and a commercial insecticide. The use of a fungicide, an anti-plant virus agent and an acaricide in combination for controlling agricultural, forestry, horticultural plant pests, diseases, virus diseases and preparation methods.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: February 2, 2021
    Assignee: Nankai University
    Inventors: Zhijin Fan, Lai Chen, Xiaofeng Guo, Yujie Zhu, Xiaolin Qian, Liuyong Ma, Nailou Zhang, Haixia Wang, Zhiming Zhang, Jinghua Xu, Yinqi Song
  • Patent number: 10873341
    Abstract: The present disclosure relates to a capacitor array for an analog-to-digital converter, a successive approximation register analog-to-digital converter and a capacitor array board. The capacitor array includes a control logic generation circuit, a control code logic conversion circuit, a first sub-capacitor array and a second sub-capacitor array configured to form different regions of a high-order bit region and a low-order bit region. In the present disclosure, the capacitances of the second capacitor units are equal, so that the second capacitor units can be sequentially switched. Thus, no matter which bit in the second binary code changes, it will not cause a large number of the second capacitor units to switch together, thereby reducing conversion error. In addition, the capacitor array is divided in regions, which avoids the problem of a large number of parallel branches in case where only the second sub-capacitor array is arranged.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: December 22, 2020
    Assignee: Radiawave Technologies Co., Ltd.
    Inventors: Xiaofeng Guo, Haigang Feng, Jon Sweat Duster, Yulin Tan, Ning Zhang
  • Patent number: 10857702
    Abstract: A PVB film for HUD, a forming mold and a forming method thereof are presented. The accuracy error of HUD imaging achieved by the PVB film for HUD is ±0.1 mrad. The forming mold includes an upper mold and a lower mold, the two of which can form an enclosed mold cavity when clamped together, wherein protective films are disposed on inner surfaces of the upper mold and the lower mold, respectively, for supporting PVB material and preventing the PVB material from bonding with the upper mold and the lower mold, and wherein shapes of the protective films match shapes of the upper mold and the lower mold.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: December 8, 2020
    Assignee: SAINT-GOBAIN GLASS FRANCE
    Inventor: Xiaofeng Guo
  • Patent number: 10804918
    Abstract: The present disclosure relates to a mismatch calibration circuit for a current steering DAC of a SoC baseband chip and a SoC baseband chip. The mismatch calibration circuit includes current mirror compensation circuits, a calibration switching switch module, a calibration resistor, a voltage detection module, and a calibration control module. The resistance of the calibration resistor is 2N?1 times the resistance of the load resistor, where N is the number of MSBs. The number of the current mirror compensation circuits is equal to the number of the MSB current mirror branches. The current mirror compensation circuits are connected in parallel with the MSB current mirror branches to form current mirror parallel branches. The present disclosure minimizes mismatch error between the output currents of the current mirror array in the SoC baseband chip of 28 nm process or even a smaller process dimension, thereby improving conversion accuracy of the DAC.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: October 13, 2020
    Assignee: Radiawave Technologies Co., Ltd.
    Inventors: Xiaofeng Guo, Jon Sweat Duster, Haigang Feng, Ning Zhang, Yulin Tan
  • Publication number: 20200259500
    Abstract: The present application discloses an N-bit hybrid-structure analog-to-digital converter and an integrated circuit chip including the same, including a pre-stage sampling capacitor array, a post-stage capacitor array and a comparator set and the pre-stage sampling capacitor array including a number of 2N?1 sets of first capacitor array units arranged in parallel, the first capacitor array unit including two sets of parallel capacitor strings, input terminals of parallel capacitor strings respectively being connected to and switchable between differential analog signals and first preset reference signals, output terminals of the parallel capacitor strings respectively being connected to input terminals of the comparator set, input terminals of the post-stage capacitor array respectively being connected to and switchable between output terminals of the comparator set and differential analog signals, output terminals of the post-stage capacitor array being configured as an output terminal of the analog-to-digital
    Type: Application
    Filed: November 6, 2018
    Publication date: August 13, 2020
    Inventors: Xiaofeng GUO, Haigang FENG, Jon Sweat DUSTER, Ning ZHANG, Yulin TAN
  • Publication number: 20200247334
    Abstract: An outer trim of a pillar for a vehicle which is arranged at a pillar sheet metal of the vehicle, includes a pillar bracket fixedly connected to the pillar sheet metal; and a glass forming an outer decorative face of the outer trim of the pillar, the glass connecting and covering the outer surface of the pillar bracket.
    Type: Application
    Filed: December 6, 2018
    Publication date: August 6, 2020
    Inventor: Xiaofeng GUO
  • Publication number: 20200162096
    Abstract: The present disclosure relates to a capacitor array for an analog-to-digital converter, a successive approximation register analog-to-digital converter and a capacitor array board. The capacitor array includes a control logic generation circuit, a control code logic conversion circuit, a first sub-capacitor array and a second sub-capacitor array configured to form different regions of a high-order bit region and a low-order bit region. In the present disclosure, the capacitances of the second capacitor units are equal, so that the second capacitor units can be sequentially switched. Thus, no matter which bit in the second binary code changes, it will not cause a large number of the second capacitor units to switch together, thereby reducing conversion error. In addition, the capacitor array is divided in regions, which avoids the problem of a large number of parallel branches in case where only the second sub-capacitor array is arranged.
    Type: Application
    Filed: September 19, 2018
    Publication date: May 21, 2020
    Applicant: Radiawave Technologies Co., Ltd.
    Inventors: Xiaofeng GUO, Haigang FENG, Jon Sweat DUSTER, Yulin TAN, Ning ZHANG
  • Publication number: 20200127675
    Abstract: The present disclosure relates to a mismatch calibration circuit for a current steering DAC of a SoC baseband chip and a SoC baseband chip. The mismatch calibration circuit includes current mirror compensation circuits, a calibration switching switch module, a calibration resistor, a voltage detection module, and a calibration control module. The resistance of the calibration resistor is 2N?1 times the resistance of the load resistor, where N is the number of MSBs. The number of the current mirror compensation circuits is equal to the number of the MSB current mirror branches. The current mirror compensation circuits are connected in parallel with the MSB current mirror branches to form current mirror parallel branches. The present disclosure minimizes mismatch error between the output currents of the current mirror array in the SoC baseband chip of 28 nm process or even a smaller process dimension, thereby improving conversion accuracy of the DAC.
    Type: Application
    Filed: October 25, 2018
    Publication date: April 23, 2020
    Inventors: Xiaofeng GUO, Jon Sweat DUSTER, Haigang FENG, Ning ZHANG, Yulin TAN
  • Publication number: 20190329480
    Abstract: A PVB film for HUD, a forming mold and a forming method thereof are presented. The accuracy error of HUD imaging achieved by the PVB film for HUD is ±0.1 mrad. The forming mold includes an upper mold and a lower mold, the two of which can form an enclosed mold cavity when clamped together, wherein protective films are disposed on inner surfaces of the upper mold and the lower mold, respectively, for supporting PVB material and preventing the PVB material from bonding with the upper mold and the lower mold, and wherein shapes of the protective films match shapes of the upper mold and the lower mold.
    Type: Application
    Filed: December 28, 2017
    Publication date: October 31, 2019
    Inventor: Xiaofeng GUO
  • Publication number: 20190031627
    Abstract: The present invention is that provided a synthesis method of a series of isothiazole oxime ether-containing strobilurin derivatives IV. The present invention relates to 3,4-dichloroisothiazolyl oxime ether strobilurin derivatives, and their chemical structural formula is as shown by IV. The invention discloses the structural formula of the above compound, the synthesis method and the use as an insecticide, a fungicide, an anti-plant virus agent, and an agriculturally acceptable auxiliary or synergist and a commercial insecticide. The use of a fungicide, an anti-plant virus agent and an acaricide in combination for controlling agricultural, forestry, horticultural plant pests, diseases, virus diseases and preparation methods.
    Type: Application
    Filed: January 25, 2017
    Publication date: January 31, 2019
    Inventors: Zhijin Fan, Lai Chen, Xiaofeng Guo, Yujie Zhu, Xiaolin Qian, Liuyong Ma, Nailou Zhang, Haixia Wang, Zhiming Zhang, Jinghua Xu, Yinqi Song
  • Publication number: 20180330387
    Abstract: Conducting a group buying advertising campaign. Receiving a specification for a group-buying offer. Creating a candidate ad campaign based on the received specification. The candidate ad campaign includes at least one campaign feature. The candidate ad is characterized by at least one generalized feature. Determining the expected effectiveness of the candidate ad campaign. For an expected effectiveness less than the aggregate effectiveness of a set of at least one previously run ad campaigns having a generalized feature in common with the candidate campaign, editing the candidate ad campaign to incorporate at least one feature of the set of at least one previously run ad campaigns. Running the edited ad campaign in an ad display network. Collecting effectiveness data for each run ad campaign.
    Type: Application
    Filed: November 9, 2012
    Publication date: November 15, 2018
    Applicant: GOOGLE INC.
    Inventors: Christopher Kenneth Harris, Xiaofeng Guo, Ke Huang, Bahman Rabii, Alok Goel