Abstract: A display substrate and a display apparatus. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a virtual sub-pixel; the display region surrounds these three regions; the first signal line passes through the inter-opening region, provides a display signal to the pixel array and passes through the virtual sub-pixel the virtual pixel circuit of the virtual sub-pixel includes a compensation capacitor. The first electrode plate of the compensation capacitor is in the same layer as the first signal line and electrically connected with the first signal line; the second electrode plate of the compensation capacitor is in a different layer from and at least partially overlaps with the first electrode plate.

Abstract: A display substrate and a display device are provided. In the display substrate, each of the plurality of anode groups includes a first anode and a second anode, the first anode includes a first main body portion, a first connection portion, an extension portion and an anode compensation portion, an orthographic projection of the anode compensation portion on the base substrate covers one thin film transistor, the anode compensation portion has a first point at a side away from the second center line, and the first main body portion has a second point at the first side, the first anode and a connection line between the first point and the second point enclose a notch region, and an area of the notch region is greater than at least one of an area of the anode compensation portion and an area of the first connection portion.

Abstract: A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region and a peripheral region, the peripheral region includes a first scan driving circuit and a second scan driving circuit on a first side of the display region, the peripheral region further includes a binding region on a second side of the display region, the peripheral region includes an organic insulation layer, the organic insulation layer at least partially covers the first scan driving circuit and the second scan driving circuit, and includes a first groove that is in a strip shape and extends substantially along a first direction to expose a portion between the first scan driving circuit and the second scan driving circuit, and the first groove also extends from the first side to the second side and extends substantially along a second direction on the second side.

Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate. Each sub-pixels includes a pixel circuit. The plurality of sub-pixels include a first sub-pixel. The compensation sub-circuit of the first sub-pixel includes a first electrode, a second electrode, and a connection portion between the first electrode and the second electrode. The first drive electrode of the light-emitting element of the first sub-pixel includes a first main body portion including a first side parallel to a certain direction, and a first protruding portion protruding from the first side of the first main body portion. The first protruding portion at least partially overlaps with the connection portion of the compensation sub-circuit of the first sub-pixel in a direction perpendicular to the base substrate. The light-emitting element of the first sub-pixel is configured to emit green light.

Abstract: The present disclosure relates to a display substrate and a display device. The display substrate includes: a base substrate including a display area and a non-display area includes a fan-out area; a signal line layer including a plurality of signal lines located in the fan-out area; a first metal layer including a first power line located in the non-display area; a first electrode layer including a first electrode portion; and an organic insulating layer having a groove located in the non-display area. On the base substrate, an orthographic projection of the first electrode portion at least partially overlaps with that of the first power line, an orthographic projection of the organic insulating layer at an edge of the groove at least partially overlaps with that of the fan-out area in a first overlapping area having at least part not overlapping with an orthographic projection of the first electrode portion.

Abstract: A display panel, comprising a first insulating structural layer, a first crack detection line, a second insulating structural layer and a second crack detection line which are sequentially arranged on a substrate, wherein the first crack detection line and the second crack detection line are both located in a peripheral area and are arranged around a display area, one end of the first crack detection line is configured to receive a detection signal, and the other end of the first crack detection line is configured to output a first output signal, and one end of the second crack detection line is configured to receive a detection signal and the other end of the second crack detection line is configured to output a second output signal.

Abstract: Disclosed are a display substrate and a display device. The display substrate includes: a base substrate, a first gate layer, a second gate layer and a first conductive layer. The first gate layer includes a reset signal line extending in a first direction, and a first electrode block; the second gate layer includes a second electrode block, wherein the second electrode block is configured to form a storage capacitor with the first electrode block; and the first conductive layer includes a power line extending in a second direction, wherein the reset signal line and the power line have a first overlapped region, and the second electrode block and the power line have a second overlapped region. The width of the power line located in the first overlapped region is smaller than the width of the power line located in the second overlapped region.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes: a base substrate at least including a pixel area and a hole area; a plurality of sub-pixels arranged on the base substrate and located in the pixel area; a hole in the hole area; a first barrier dam arranged between the sub-pixels and the hole and at least partially surrounding the hole; an organic material layer including at least one film layer, wherein an orthographic projection of the organic material layer on the base substrate falls within the pixel area; and a filling structure, wherein at least a portion of the filling structure is arranged between the hole and the first barrier dam, and the filling structure and the at least one film layer of the organic material layer are located in the same layer and include the same material.

Abstract: A display substrate includes: a base substrate including a display region and a non-display region surrounding the display region; a plurality of sub-pixels in the display region; a plurality of power lines in the display region, the plurality of power lines extending along a first direction, and being electrically connected to the plurality of sub-pixels and being configured to provide power signals for the plurality of sub-pixels; a plurality of dummy sub-pixels in the non-display region on one side of the display region along the first direction; and a plurality of dummy power lines in the non-display region, the plurality of dummy power lines extending along the first direction, the plurality of dummy power lines and the plurality of dummy sub-pixels being on the same side of the display region.

Abstract: A display substrate and a display panel are disclosed. The display substrate includes a base substrate having an active area and a peripheral area surrounding the active area; a plurality of sub-pixels, in the active area; a plurality of first pins and a plurality of second pins located in the peripheral area; a plurality of first array test pins located between the plurality of first pins and the plurality of second pins and respectively electrically coupled to a plurality of array test signal lines; and a plurality of second array test pins located between the plurality of first pins and the plurality of second pins and extending in a direction along a boundary of the active area, wherein the plurality of first array test pins are located on at least one side of the plurality of second array test pins in the direction along the boundary of the active area.

Abstract: A display substrate, a display panel and a display device. A pixel circuit includes a power supply wire providing a power supply voltage to the display pixel; a drive circuit in the non-display region includes a drive signal wire providing a drive signal to the pixel circuit; the power supply wire includes a narrow wire portion overlapping with the drive signal wire and a wide wire portion; a wire width of the narrow wire portion is less than that of the wide wire portion; the display substrate has a first side for display and a second side opposite to the first side, includes a bending region at an edge of the base substrate; the power supply wire and the drive signal wire extend from the first side to the bending region, crossing the bending region to extend to the second side; the narrow wire portion is on the second side.

Abstract: The present disclosure provides an array substrate, a method for manufacturing an array substrate and a display panel. The array substrate includes: a base having a display area, a peripheral area surrounding the display area, and a visible area located between the display area and the peripheral area; a plurality of voltage signal lines disposed on the base; a metal strip disposed on the base, the voltage signal lines are coupled to the metal strip, at least a portion of the metal strip is located in the visible area, and the portion of the metal strip located in the visible area is provided with an opening.

Abstract: A display substrate and a display device are disclosed. In the display substrate, a pixel defining layer includes a plurality of opening groups, each of the opening groups includes a first opening and a second opening, the spacer is located between the first opening of a first opening group row and the second opening of a second opening group row, an orthographic projection of the first opening includes a first long edge, and an orthographic projection of the second opening includes a second long edge, an orthographic projection of the spacer includes a third long edge, and an angle between the third long edge and the first long edge ranges from 20 degrees to 70 degrees, the orthographic projection of the first opening includes a first short edge, and the length of the third long edge is greater than a that of the first short edge.

Abstract: The array substrate includes: a base substrate including a display area and a peripheral area at least on a side of the display area, wherein the peripheral area includes a first trace area and a second trace area; a plurality of sub-pixels in the display area; a plurality of data lines in the display area and electrically connected to the plurality of sub-pixels; and a plurality of data signal transmission lines in the peripheral area and electrically connected to the plurality of data lines, wherein at least one of the data signal transmission lines includes: a first transmission line segment in the first trace area and a second transmission line segment in the second trace area being that are in two different layers and electrically connected to each other; wherein a spacing between two adjacent data lines is greater than a spacing between two adjacent data signal transmission lines.

Abstract: A display area of the array substrate only includes first sub-pixels capable of emitting light. In each two adjacent rows of first sub-pixels, a gate line electrically connected to one row of the plurality of rows of first sub-pixels and a reset signal line electrically connected to another row of the plurality of rows of first sub-pixels are electrically connected to the same first gate drive circuit. A target line electrically connected to a first row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a second gate drive circuit. A target line electrically connected to a last row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a third gate drive circuit.

Abstract: The present disclosure relates to a display substrate, a display panel and a display device. The display substrate includes: a base substrate including a display area and a peripheral area surrounding the display area; a common electrode located in the peripheral area and surrounding the display area; a panel crack detection line located in the peripheral area and surrounding the display area, wherein the panel crack detection line is located on one side of the common electrode away from the display area; and at least one electrostatic discharge circuit located in the peripheral area, wherein the at least one electrostatic discharge circuit includes at least one first thin film transistor including an active layer, a gate, a source and a drain, the source and the drain are electrically connected to the panel crack detection line, and the gate is electrically connected to the common electrode.

Abstract: The present application provides a display substrate and a method for manufacturing the same and a display device. In the display substrate, each sub-pixel includes: a power signal line; sub-pixel driver circuits and a shielding pattern. The sub-pixel driver circuit includes a driver transistor and a compensation transistor of double-gate structure. The shielding pattern is electrically coupled with the power signal line in the sub-pixel which is adjacent the shielding pattern in a second direction. There is an overlap area between an orthographic projection of the shielding pattern onto the base substrate and an orthographic projection of the conductor pattern onto the base substrate; the second direction intersects the first direction. The sub-pixels include multiple first sub-pixels and multiple second sub-pixels; the overlap area in the first sub-pixel is greater than the overlap area in the second sub-pixel.

Abstract: Provided is a gas switch triggered by an optical pulse introduced by an optical fiber, which solves the problem of the existing electrically-triggered gas switch and laser-triggered gas having a complicated trigger system, being insufficiently reliable and having a higher cost due to the pulse amplitude/laser beam energy having higher requirements. The gas switch triggered by an optical pulse introduced by an optical fiber includes at least one trigger gap and one self-breakdown gap; each trigger gap is connected in parallel to a photoconductive switch, and an optical fiber is correspondingly provided for introducing an optical pulse for triggering.

Abstract: A display substrate includes a scanning driving circuit arranged on a base substrate. The scanning driving circuit includes a plurality of shift register units and a first voltage signal line extending in a first direction. At least one shift register unit includes an output capacitor and a first transistor, a first electrode thereof is coupled to the first voltage signal line, and a second electrode thereof is coupled to an electrode plate of the output capacitor. A maximum distance between an orthogonal projection of the first electrode/second electrode of the first transistor onto the base substrate and an orthogonal projection of the first voltage signal line/the electrode plate of the output capacitor onto the base substrate is smaller than a first/second predetermined distance in a second direction, and the first direction intersects the second direction.

Abstract: This disclosure provides a display panel and a display device. In the display panel, orthographic projections of a first conductive layer of the first electrode layer and the peripheral drive circuit on a plane where the drive back plate is located at least partially overlap, and the signal line is connected to the first conductive layer. The pixel definition layer includes a pixel definition area in the display area and insulating strips in the peripheral area. A separating groove exposing the first conductive layer is formed between at least two adjacent ones of the insulating strips. A second conductive layer of the second electrode layer covers the insulating strip, forms a recessed area in an area corresponding to the separating groove and is connected with the first conductive layer. The packaging layer covers the second electrode layer and fills the recessed area.