Abstract: In semiconductor processing. plasma etching of materials (e.g., of carbon or silicon) to form vertical high aspect ratio recessed features can lead to clogging inside the recessed features due to unwanted deposition of a mask-derived clogging material (e.g., silicon oxide). This is addressed by declogging, which includes etching the clogging material preferably in the same process chamber by contacting the substrate with a halogen source. After the declogging step, plasma etching proceeds further. The declogging and plasma etching steps can be repeated as many times as needed to etch a recessed feature of desired depth.

Abstract: Various embodiments herein relate to methods and apparatus for etching a substrate. The substrate is typically a semi-conductor substrate. In various implementations, the method involves receiving the substrate in a process chamber, the substrate including a carbon layer and a mask layer positioned over the carbon layer, where the mask layer is patterned to define where the feature will be etched in the carbon layer; and exposing the substrate to a plasma to etch the feature into the carbon layer of the substrate, wherein a composition of the plasma changes over time to provide at least a deposition step, a clear step, and an etch step, and wherein the deposition step, the clear step, and the etch step are cycled with one another until the feature reaches its final depth.

Abstract: Methods for etching features into carbon material using a doped tungsten-containing mask, such as a boron-doped tungsten material. to reduce and eliminate redeposition of silicon-containing residues are provided herein. Methods involve de-positing a doped tungsten-containing material over the carbon material prior to etching the carbon material, patterning the doped tungsten-containing material to form a doped tungsten-containing mask, and using the patterned doped tungsten-containing mask to etch the carbon material such that the use of a silicon-containing mask during etch of the carbon material is eliminated.

Abstract: In semiconductor processing, plasma etching of materials (e.g., of carbon or silicon) to form vertical high aspect ratio recessed features can lead to clogging inside the recessed features due to unwanted deposition of a mask-derived clogging material (e.g., silicon oxide). This is addressed by declogging, which includes etching the clogging material preferably in the same process chamber by contacting the substrate with a halogen source and a vapor of an organic solvent and/or water. An additive, such as an amine, a heterocyclic compound, or a bifluoride source can be added to increase etch selectivity for the clogging material. After the declogging step, plasma etching proceeds further. The declogging and plasma etching steps can be repeated as many times as needed to etch a recessed feature of desired depth.

Abstract: This application discloses a system for turning off power consumption of an auxiliary startup circuit. An oscillator generates a switch control signal based on a reference current output by a circuit to be started up to generate a working clock of a switch control signal generation circuit after the circuit to be started up works normally. After fixed clock signal counting, the switch control signal generation circuit outputs a switch control signal to control power consumption of normally open current of the auxiliary startup circuit to be turned off. At the same time, the switch control signal generation circuit stops counting the clock. This application can assist the circuit to be started up having a “degeneracy” bias point to power on normally, and can also turn off the power consumption of the auxiliary startup circuit after the circuit to be started up is powered on.

Abstract: This application discloses a system for turning off power consumption of an auxiliary startup circuit. An oscillator generates a switch control signal based on a reference current output by a circuit to be started up to generate a working clock of a switch control signal generation circuit after the circuit to be started up works normally. After fixed clock signal counting, the switch control signal generation circuit outputs a switch control signal to control power consumption of normally open current of the auxiliary startup circuit to be turned off. At the same time, the switch control signal generation circuit stops counting the clock. This application can assist the circuit to be started up having a “degeneracy” bias point to power on normally, and can also turn off the power consumption of the auxiliary startup circuit after the circuit to be started up is powered on.

Abstract: Provided herein are methods and related apparatus for mask reconstruction in an etch process. The methods involve depositing a sacrificial layer on the mask layer. The sacrificial layer may be used to protect portions of the mask layer during reshaping by inhibiting etching of or deposition on the mask layer position on the mask layer. Following mask reshaping, the sacrificial layer may be removed using the same etch process that is used to etch the target material.

Abstract: A method for etching features in a carbon containing layer below a mask is provided. A simultaneous etch and passivation step is provided comprising flowing an etch gas comprising a boron containing passivant gas and an oxygen containing gas. A plasma is created from the etch gas, wherein the plasma etches features in the carbon containing layer.

Abstract: Provided herein are methods and related apparatus for mask reconstruction in an etch process. The methods involve depositing a sacrificial layer on the mask layer. The sacrificial layer may be used to protect position on the mask layer. Following mask reshaping, the sacrificial layer may be removed using the same etch process that is used to etch the target material.

Abstract: A driving control method for an intersection traffic light array is provided. The intersection traffic light array includes Nxi horizontal ground traffic light sets. The Nxi horizontal ground traffic light sets include a horizontal ground traffic light set pxi which is disposed at an intersection safety line position of an entrance lane xi of a planar intersection. The Nxi horizontal ground traffic light sets further include a horizontal ground traffic light set qxi which is disposed at a stop line position of the entrance lane xi. Each horizontal ground traffic light set includes at least one traffic light, and part or all of traffic lights of a horizontal ground traffic light set i are provided with a wireless driving signal input port and/or a wired driving signal input port.

Abstract: A driving control apparatus for an intersection traffic light array is provided. The intersection traffic light array includes Nxi horizontal ground traffic light sets. The Nxi horizontal ground traffic light sets include a horizontal ground traffic light set pxi which is disposed at an intersection safety line position of an entrance lane xi of a planar intersection. The Nxi horizontal ground traffic light sets further include a horizontal ground traffic light set qxi which is disposed at a stop line position of the entrance lane xi. Each horizontal ground traffic light set includes at least one traffic light, and part or all of traffic lights of a horizontal ground traffic light set i are provided with a wireless driving signal input port and/or a wired driving signal input port.

Abstract: A driving control apparatus for an intersection traffic light array is provided. The intersection traffic light array includes Nxi horizontal ground traffic light sets. The Nxi horizontal ground traffic light sets include a horizontal ground traffic light set pxi which is disposed at an intersection safety line position of an entrance lane xi of a planar intersection. The Nxi horizontal ground traffic light sets further include a horizontal ground traffic light set qxi which is disposed at a stop line position of the entrance lane xi. Each horizontal ground traffic light set includes at least one traffic light, and part or all of traffic lights of a horizontal ground traffic light set i are provided with a wireless driving signal input port and/or a wired driving signal input port.

Abstract: A driving control method for an intersection traffic light array is provided. The intersection traffic light array includes Nxi horizontal ground traffic light sets. The Nxi horizontal ground traffic light sets include a horizontal ground traffic light set pxi which is disposed at an intersection safety line position of an entrance lane xi of a planar intersection. The Nxi horizontal ground traffic light sets further include a horizontal ground traffic light set qxi which is disposed at a stop line position of the entrance lane xi. Each horizontal ground traffic light set includes at least one traffic light, and part or all of traffic lights of a horizontal ground traffic light set i are provided with a wireless driving signal input port and/or a wired driving signal input port.