Abstract: A battery defect inspection device, method, and apparatus are disclosed. The battery defect inspection device includes a ray source, a detector, and a supporting component between the ray source and the detector. A battery under inspection is configured to be located on a supporting surface of the supporting component. The battery defect inspection device further includes a rotation mechanism. The rotation mechanism is configured to rotate the supporting component along a preset rotation axis, or is configured to rotate the ray source and the detector about a preset rotation axis, such that the optical axis of the rays emitted from the ray source is projected obliquely onto a surface of the battery under inspection. At least an included angle between an end surface of the battery under inspection and a plane on which the detector is located can be flexibly adjusted according to the needs of different inspection scenarios.

Abstract: A testing apparatus and method for testing a battery, a device, and a medium are disclosed. The testing apparatus includes a first ray source, a first detector, a second ray source, a second detector, a bearing platform, and a testing unit. The bearing platform is configured to place a battery to be tested, and the bearing platform is movable. A movement trajectory of the bearing platform passes between the first ray source and the first detector, and the movement trajectory of the bearing platform passes between the second ray source and the second detector. The testing unit is respectively connected to the first detector and the second detector. The testing unit is configured to perform defect testing on the battery to be tested based on a ray received by the first detector and a ray received by the second detector.

Abstract: An input end of the first voltage conversion circuit and an input end of the second voltage conversion circuit are coupled to a power supply end; an output end of the first voltage conversion circuit is configured to be coupled to a positive electrode of a first battery, a negative electrode of the first battery is coupled to a positive electrode of a second battery, and a negative electrode of the second battery is coupled to a ground; and an output end of the second voltage conversion circuit is configured to be coupled to the positive electrode of the second battery. A first voltage conversion ratio of the first voltage conversion circuit is different from a second voltage conversion ratio of the second voltage conversion circuit, and a working state of the first voltage conversion circuit and a working state of the second voltage conversion circuit overlaps.

Abstract: Embodiments of the present disclosure provide a transmission system of a medical device, comprising a first transceiver on a rotor and a second transceiver on a stator, wherein the first transceiver on the rotor is configured to transmit scanning data to and receive control signals from the second transceiver on the stator; the second transceiver on the stator is configured to transmit the control signals to and receive the scanning data from the first transceiver on the rotor; and a bidirectional transmission between the first transceiver and the second transceiver is wireless.

Abstract: An LLC chip and a cache system are provided. The LLC chip includes a storage wafer, an interface logic unit and a packaging substrate. The interface logic unit and the storage wafer are arranged in sequence on the packaging substrate. A plurality of processing assemblies is connected to the interface logic unit so as to perform read and write operations on the storage wafer through the interface logic unit. The storage wafer includes at least one storage space. The plurality of processing assemblies performs read and write operations on a specific storage space or any storage space so as to achieve non-shared independent storage access or shared storage access. Signal transmission bandwidth is thus improved by means of the plurality of distributed interfaces, and data is cached by means of a non-shared mode or shared mode so as to increase data accessing efficiency of the processing assemblies.

Abstract: A time-series image description method for dam defects based on local self-attention mechanism is provided, including: performing frame sampling on an input time-series image of dam defect, extracting a feature sequence using a convolutional neural network and using the sequence as an input to a self-attention encoder, where the encoder includes a Transformer network based on a variable self-attention mechanism that dynamically establishes contextual feature relations for each frame; generating description text using a long short term memory (LSTM) network based on a local attention mechanism to enable each word predicted to be feature related to an image frame, improving text generation accuracy by establishing a contextual dependency between image and text. A dynamic mechanism is added to the present application for calculating the global self-attention of image frames, and LSTM networks with added local attention directly establish the correspondence between image and text modal data.

Abstract: Disclosed is an intelligent recognition method for a time sequence image of a concrete dam defect. The method includes: extracting a feature sequence of the time sequence image containing the concrete dam defect; matching a located defect with a real defect by using an objective function; adding a loss term based on a tight sensing intersection-over-union to a loss function of a model so as to pay attention to integrity of a defect sequence and improve accuracy; and extracting a defect feature and recognizing a defect type after completing defect location. According to the present disclosure, the time sequence image of the concrete dam defect is detected effectively, so that a defect in a long image sequence can be located and the defect type can be recognized accurately.

Abstract: A testing apparatus comprises an X-ray source, a linear array detector and a carrying platform. The linear array detector is opposite an emission port of the X-ray source, the carrying platform can move in a first direction Y, a movement trajectory of the carrying platform passes between the X-ray source and the linear array detector, and the carrying platform is configured to carry a battery to be tested. The linear array detector comprises a plurality of columns of sensing regions, which are arranged in the first direction Y.

Abstract: A testing apparatus and method for testing a battery, a device, and a medium are disclosed. The testing apparatus includes a first ray source, a first detector, a second ray source, a second detector, a bearing platform, and a testing unit. The bearing platform is configured to place a battery to be tested, and the bearing platform is movable. A movement trajectory of the bearing platform passes between the first ray source and the first detector, and the movement trajectory of the bearing platform passes between the second ray source and the second detector. The testing unit is respectively connected to the first detector and the second detector. The testing unit is configured to perform defect testing on the battery to be tested based on a ray received by the first detector and a ray received by the second detector.

Abstract: A battery defect inspection device, method, and apparatus are disclosed. The battery defect inspection device includes a ray source, a detector, and a supporting component between the ray source and the detector. A battery under inspection is configured to be located on a supporting surface of the supporting component. The battery defect inspection device further includes a rotation mechanism. The rotation mechanism is configured to rotate the supporting component along a preset rotation axis, or is configured to rotate the ray source and the detector about a preset rotation axis, such that the optical axis of the rays emitted from the ray source is projected obliquely onto a surface of the battery under inspection. At least an included angle between an end surface of the battery under inspection and a plane on which the detector is located can be flexibly adjusted according to the needs of different inspection scenarios.

Abstract: The present disclosure provides devices, methods, and systems for controlling a connection, via a communication apparatus, between a first apparatus and a second apparatus. For instance, the methods may include generating a connection signal in response to determining that a second apparatus has established a new connection with the communication apparatus; generating a control signal based on the connection signal; and changing, based on the control signal, a connection state between the first apparatus and the communication apparatus to cause a new connection relationship between the first apparatus and the second apparatus to be established for a communication between the first apparatus and the second apparatus.

Abstract: Provided is a method for determining huff and puff fluid volumes in multi-scale spaces of shale oil reservoirs, including the following steps: rock sample pretreatment; porosity stress sensitivity testing; high pressure hg injection testing and nuclear magnetic resonance testing benchmarking; online nuclear magnetic resonance testing; data processing and analysis. Firstly, a changing law of multi-scale spaces of shale oil reservoirs with an effective stress is characterized through a pore stress sensitivity measurement and online nuclear magnetic resonance measurement combined experiment, and then the huff and puff fluid volumes of multi-scale spaces of shale oil reservoirs under a condition of a certain stimulated reservoir volume are calculated. A usage amount of a fracturing fluid for a fracturing horizontal well in the shale oil reservoir is determined from the perspective of giving full play to the imbibition replacement role of micro-nano pores.

Abstract: A dust collection assembly is provided with a dust inlet, a dust extraction opening, and a dust collection cavity in communication with the dust inlet and the dust extraction opening. The dust collection assembly includes a bottom wall and a sidewall; the sidewall is extended along a circumferential direction of the bottom wall, the sidewall is connected to the bottom wall to form the dust collection cavity, and the dust extraction opening is provided on the sidewall. The sidewall is connected to the bottom wall to form a dust collection cavity. The dust extraction opening is provided on the sidewall. The design that the dust extraction opening and its ancillary structures are provided on the bottom wall is canceled, and the bottom region near the bottom wall is utilized as the volume of the dust collection cavity, which improves the utilization of the dust collection space.

Abstract: Provided are a near-memory computing module and method, a near-memory computing network, and a construction method. The near-memory computing module employs a three-dimensional design, computing submodules and a memory submodule are provided in different layers, the layers are connected by means of bonding, and the total data bit width connected is a positive integer multiple of the data bit width of a single computing unit (201). Multiple memory units (203) are provided in the memory submodule, thus allowing a large memory capacity to be implemented in a single memory submodule. Computing units of the computing submodule exchange data with each other via an exchange interface of a router (202); moreover, among the computing submodules data is accessed via a routing interface. The near-memory computing network utilizes the near-memory computing module and satisfies computing requirements of different scales.

Abstract: A charging circuit includes at least two direct current-direct current (DC-DC) conversion circuits coupled between a power supply end and a charging end of the charging circuit. A voltage input end of the DC-DC conversion circuit is coupled to the power supply end, and a voltage output end of the DC-DC conversion circuit is coupled to the charging end. The at least two DC-DC conversion circuits include a first DC-DC conversion circuit and a second DC-DC conversion circuit. The first DC-DC conversion circuit is configured to perform voltage conversion on a voltage at the power supply end, to output a first charging signal to the battery. The second DC-DC conversion circuit is configured to perform voltage conversion on the voltage at the power supply end to output a second charging signal to the battery.

Abstract: The present application relates to an in-memory computing module and method, and an in-memory computing network and a construction method therefor. The in-memory computing module comprises at least two computing submodules, and low latency can be achieved when computing units in the computing submodules access memory units. Multiple computing submodules present a symmetric layer design, and such a symmetric layer structure facilitates the construction of a topology network so as to achieve large-scale or ultra-large-scale computation. The memory capacity of the memory units in each computing submodule can be customized, and designed flexibly. These computing submodules are in a bonding connection, and the data bit width after the bonding connection may be positive integer multiple of the data bit width of the computing units, so that high data bandwidth is achieved.

Abstract: The present application provides a data backup method and a restoration method for an NVDIMM, an NVDIMM controller and an NVDIMM. The NVDIMM (200) comprises a DRAM (201), a NAND flash memory (202) and an NVDIMM controller (100), the NVDIMM controller (100) controlling the NVDIMM (200) and comprising a DDR controller (101), a NAND flash memory controller (102), a data backup module (103) and a data restoration module (104), the DDR controller (101) using and enabling DBI mechanism. During data backup, the DDR controller (101) reads N-bit DQi and 1-bit DBI from the DRAM (201) and sends the same to the data backup module (103). When DBIi is “1”, the data backup module (103) compares the DQi and DQi-1. If the number of bits of the DQi and the DQi-1 with different values is greater than N/2, then the DQi is inverted and the DBIi is set to “0”, and otherwise the DQi and the DBIi are remained unchanged. When the DBIi is “0”, the DQi and the DBIi are remained unchanged.

Abstract: An LLC chip and a cache system are provided. The LLC chip includes a storage wafer, an interface logic unit and a packaging substrate. The interface logic unit and the storage wafer are arranged in sequence on the packaging substrate. A plurality of processing assemblies is connected to the interface logic unit so as to perform read and write operations on the storage wafer through the interface logic unit. The storage wafer includes at least one storage space. The plurality of processing assemblies performs read and write operations on a specific storage space or any storage space so as to achieve non-shared independent storage access or shared storage access. Signal transmission bandwidth is thus improved by means of the plurality of distributed interfaces, and data is cached by means of a non-shared mode or shared mode so as to increase data accessing efficiency of the processing assemblies.

Abstract: The NVDIMM (200) comprises a DRAM (201), a NAND flash memory (202) and a NVDIMM controller (100), the NVDIMM controller (100) controlling the NVDIMM (200) and comprising a DDR controller (101), a NAND flash memory controller (102), a data backup module (103) and a data recovery module (104), and the DDR controller (101) using and enabling DBI. The backup method comprises: reading, by the DDR controller (101), N-bit DQ and 1-bit DBI from the DRAM (201) and sending the same to the data backup module; encoding, by the data backup module (103), the N-bit DQ and the 1-bit DBI into N-bit EDQ according to the values of the N-bit DQ and the 1-bit DBI, and sending the N-bit EDQ to the NAND flash memory controller; and receiving, by the NAND flash memory controller (102), the N-bit EDQ and writing the N-bit EDQ into the NAND flash memory (202).