Patents by Inventor Xiaogan Liang

Xiaogan Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11105791
    Abstract: The present invention provides methods and apparatus that can manipulate, detect, and/or analyze single molecules, single small particles or single small samples of matter passing through a nanoscale gap within a nanofluidic channel of a detector.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: August 31, 2021
    Inventors: Stephen Y. Chou, Xiaogan Liang
  • Publication number: 20200176250
    Abstract: The superior electronic and mechanical properties of 2D-layered transition metal dichalcogenides and other 2D layered materials could be exploited to make a broad range of devices with attractive functionalities. However, the nanofabrication of such layered-material-based devices still needs resist-based lithography and plasma etching processes for patterning layered materials into functional device features. Such patterning processes lead to unavoidable contaminations, to which the transport characteristics of atomically-thin layered materials are very sensitive. More seriously, such lithography-introduced contaminants cannot be safely eliminated by conventional material wafer cleaning approaches. This disclosure introduces a rubbing-induced site-selective growth method capable of directly generating few-layer molybdenum disulfide device patterns without the need of any additional patterning processes.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Inventors: Xiaogan LIANG, Byunghoon RYU
  • Publication number: 20200056992
    Abstract: Provided herein are systems and methods for performing assays. In particular, provided herein are systems and methods for performing sensitive and rapid immunoassays.
    Type: Application
    Filed: April 23, 2018
    Publication date: February 20, 2020
    Inventors: Young Geun Park, Byunghoon Ryu, Xiaogan Liang, Katsuo Kurabayashi
  • Publication number: 20180231520
    Abstract: The present invention provides methods and apparatus that can manipulate, detect, and/or analyze single molecules, single small particles or single small samples of matter passing through a nanoscale gap within a nanofluidic channel of a detector.
    Type: Application
    Filed: October 9, 2017
    Publication date: August 16, 2018
    Applicant: Nanonex Corporation
    Inventors: Stephen Y. Chou, Xiaogan Liang
  • Patent number: 9960175
    Abstract: A method for generating a non-volatile memory device may comprise: applying plasma for a preset time period to an exposed surface of a channel of a field effect transistor such that a plurality of charge-trapping sites are formed at the channel. The channel is comprised of a multi-layer structure of atomically thin two-dimensional sheets.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: May 1, 2018
    Assignee: The Regents of The University of Michigan
    Inventors: Xiaogan Liang, Hongsuk Nam, Sungjin Wi, Mikai Chen
  • Patent number: 9810680
    Abstract: The present invention provides methods and apparatus for measuring a property of an sample, the apparatus can manipulate, detect, and analyze the sample composed of single molecules, single small particles or single small samples of matter by drawing the sample into a nanofluidic channel and stretching the sample within the channel, passing the stretched sample through a gap having a width of less than or equal to 20 nm of a nanogap detector positioned inside or adjacent to the nanofluidic channel and measuring an output from the nanogap detector representative of the property of the sample.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: November 7, 2017
    Assignee: Nanonex Corporation
    Inventors: Stephen Y. Chou, Xiaogan Liang
  • Patent number: 9678037
    Abstract: Atomically layered transition metal dichalcogenides (TMDCs) exhibit a significant potential to enable low-cost transistor biosensors that permit single-molecule-level quantification of biomolecules. Two different principles for operating such biosensors are presented. In one arrangement, antibody receptors are functionalized on an insulating layer deposited onto the channel of the transistor. The charge introduced through antigen-antibody binding is capacitively coupled with the channel and shifts the threshold voltage without significantly changing the transconductance. In another arrangement, antibodies are functionalized directly on the channel of the transistor. Antigen-antibody binding events mainly modulate the ON-state transconductance, which is attributed to the disordered potential formed in channel material.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: June 13, 2017
    Assignee: The Regents Of The University Of Michigan
    Inventors: Xiaogan Liang, Katsuo Kurabayashi
  • Publication number: 20170102357
    Abstract: Atomically layered transition metal dichalcogenides (TMDCs) exhibit a significant potential to enable low-cost transistor biosensors that permit single-molecule-level quantification of biomolecules. Two different principles for operating such biosensors are presented. In one arrangement, antibody receptors are functionalized on an insulating layer deposited onto the channel of the transistor. The charge introduced through antigen-antibody binding is capacitively coupled with the channel and shifts the threshold voltage without significantly changing the transconductance. In another arrangement, antibodies are functionalized directly on the channel of the transistor. Antigen-antibody binding events mainly modulate the ON-state transconductance, which is attributed to the disordered potential formed in channel material.
    Type: Application
    Filed: October 8, 2015
    Publication date: April 13, 2017
    Inventors: Xiaogan LIANG, Katsuo KURABAYASHI
  • Publication number: 20170018561
    Abstract: A method for generating a non-volatile memory device may comprise: applying plasma for a preset time period to an exposed surface of a channel of a field effect transistor such that a plurality of charge-trapping sites are formed at the channel. The channel is comprised of a multi-layer structure of atomically thin two-dimensional sheets.
    Type: Application
    Filed: March 6, 2015
    Publication date: January 19, 2017
    Inventors: Xiaogan LIANG, Hongsuk NAM, Sungjin WI, Mikai CHEN
  • Patent number: 9373742
    Abstract: Plasma-assisted techniques are provided for fabricating semiconductor devices. In one aspect, a plasma is applied to a substrate before exfoliating layers of a multi-layer structure of atomically thin two-dimensional sheets onto the substrate. The exfoliated layers serve as the basis for constructing a semiconductor device. In another aspect, a p-n junction is formed by applying a plasma to top layers of a multi-layer structure of atomically thin two-dimensional sheets and then exfoliating a portion of the multi-layer structure onto a bottom electrode.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: June 21, 2016
    Assignee: The Regents Of The University Of Michigan
    Inventors: Xiaogan Liang, Hongsuk Nam, Sungjin Wi, Mikai Chen
  • Publication number: 20150255661
    Abstract: Plasma-assisted techniques are provided for fabricating semiconductor devices. In one aspect, a plasma is applied to a substrate before exfoliating layers of a multi-layer structure of atomically thin two-dimensional sheets onto the substrate. The exfoliated layers serve as the basis for constructing a semiconductor device. In another aspect, a p-n junction is formed by applying a plasma to top layers of a multi-layer structure of atomically thin two-dimensional sheets and then exfoliating a portion of the multi-layer structure onto a bottom electrode.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 10, 2015
    Inventors: Xiaogan Liang, Hongsuk Nam, Sungjin Wi, Mikai Chen
  • Patent number: 9052450
    Abstract: The present invention provides a plasmonic optical transformer to produce a highly focuses optical beam spot, where the transformer includes a first metal layer, a dielectric layer formed on the first metal layer, and a second metal layer formed on the dielectric layer, where the first metal layer, the dielectric layer, and the second layer are patterned to a shape including a first section having a first cross section, a second section following the first section having a cross-section tapering from the first section to a smaller cross-section, and a third section following the second section having a cross-section matching the tapered smaller cross-section of the second section.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: June 9, 2015
    Assignee: The Regents of the University of California
    Inventors: Hyuck Choo, Stefano Cabrini, P. James Schuck, Xiaogan Liang, Eli Yablonovitch
  • Patent number: 8852494
    Abstract: A method and apparatus for performing nanoimprint lithography. When an electric field is applied between the mold and the substrate, various forces can be generated among molds, substrates, and resists. The electrostatic force between the mold and the substrate can serve as an imprinting pressure to press the structured mold into the conformable resist. In addition, the electric field induces additional wetting forces (electrowetting or dielectrophoresis) in a liquid resist, which can assist the flow and filling of the liquid resist into fine structures.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 7, 2014
    Assignee: Princeton University
    Inventors: Stephen Y. Chou, Xiaogan Liang
  • Patent number: 8163656
    Abstract: In accordance with the invention, a lateral dimension of a microscale device on a substrate is reduced or adjusted by the steps of providing the device with a soft or softened exposed surface; placing a guiding plate adjacent the soft or softened exposed surface; and pressing the guiding plate onto the exposed surface. Under pressure, the soft material flows laterally between the guiding plate and the substrate. Such pressure induced flow can reduce the lateral dimension of line spacing or the size of holes and increase the size of mesas. The same process also can repair defects such as line edge roughness and sloped sidewalls. This process will be referred to herein as pressed self-perfection by liquefaction or P-SPEL.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: April 24, 2012
    Inventors: Stephen Y. Chou, Ying Wang, Xiaogan Liang, Yixing Liang
  • Patent number: 8163657
    Abstract: In accordance with the invention, a lateral dimension of a microscale device on a substrate is reduced or adjusted by the steps of providing the device with a soft or softened exposed surface; placing a guiding plate adjacent the soft or softened exposed surface; and pressing the guiding plate onto the exposed surface. Under pressure, the soft material flows laterally between the guiding plate and the substrate. Such pressure induced flow can reduce the lateral dimension of line spacing or the size of holes and increase the size of mesas. The same process also can repair defects such as line edge roughness and sloped sidewalls. This process will be referred to herein as pressed self-perfection by liquefaction or P-SPEL.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: April 24, 2012
    Inventors: Stephen Y. Chou, Ying Wang, Xiaogan Liang, Yixing Liang
  • Patent number: 8057863
    Abstract: An embodiment of a method of depositing graphene includes bringing a stamp into contact with a substrate over a contact area. The stamp has at least a few layers of the graphene covering the contact area. An electric field is developed over the contact area. The stamp is removed from the vicinity of the substrate which leaves at least a layer of the graphene substantially covering the contact area.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: November 15, 2011
    Assignee: The Regents of the University of California
    Inventor: Xiaogan Liang
  • Publication number: 20110249546
    Abstract: The present invention provides a plasmonic optical transformer to produce a highly focuses optical beam spot, where the transformer includes a first metal layer, a dielectric layer formed on the first metal layer, and a second metal layer formed on the dielectric layer, where the first metal layer, the dielectric layer, and the second layer are patterned to a shape including a first section having a first cross section, a second section following the first section having a cross-section tapering from the first section to a smaller cross-section, and a third section following the second section having a cross-section matching the tapered smaller cross-section of the second section,
    Type: Application
    Filed: April 8, 2011
    Publication date: October 13, 2011
    Applicant: The Regents of the University of California
    Inventors: Hyuck Choo, Stefano Cabrini, P. James Schuck, Xiaogan Liang, Eli Yablonovitch
  • Publication number: 20100267158
    Abstract: The present invention provides methods and apparatus that can manipulate, detect, and/or analyze single molecules, single small particles or single small samples of matter passing through a nanoscale gap within a nanofluidic channel of a detector.
    Type: Application
    Filed: April 16, 2010
    Publication date: October 21, 2010
    Inventors: Stephen Y. Chou, Xiaogan Liang
  • Publication number: 20100140219
    Abstract: An embodiment of a method of depositing graphene includes bringing a stamp into contact with a substrate over a contact area. The stamp has at least a few layers of the graphene covering the contact area. An electric field is developed over the contact area. The stamp is removed from the vicinity of the substrate which leaves at least a layer of the graphene substantially covering the contact area.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 10, 2010
    Applicant: The Regents of the University of California
    Inventor: Xiaogan Liang
  • Publication number: 20100081282
    Abstract: In accordance with the invention, a lateral dimension of a microscale device on a substrate is reduced or adjusted by the steps of providing the device with a soft or softened exposed surface; placing a guiding plate adjacent the soft or softened exposed surface; and pressing the guiding plate onto the exposed surface. Under pressure, the soft material flows laterally between the guiding plate and the substrate. Such pressure induced flow can reduce the lateral dimension of line spacing or the size of holes and increase the size of mesas. The same process also can repair defects such as line edge roughness and sloped sidewalls. This process will be referred to herein as pressed self-perfection by liquefaction or P-SPEL.
    Type: Application
    Filed: May 4, 2009
    Publication date: April 1, 2010
    Inventors: Stephen Y. Chou, Ying Wang, Xiaogan Liang, Yixing Liang