Abstract: Provided are a low-jitter digital isolator circuit and a digital isolator including the same. The digital isolator circuit includes a signal transmitting module, a signal receiving module, and an isolation channel connected between the signal transmitting module and the signal receiving module. The signal transmitting module is provided with a signal input terminal, and the signal receiving module is provided with a signal output terminal. The signal transmitting module includes a reset circuit, an oscillator and a transmitting circuit which are sequentially connected. The reset circuit is connected to the signal input terminal. The transmitting circuit is connected to the isolation channel. The signal receiving module includes a receiving circuit connected to the isolation channel. In the present invention, more stable signal transmission and a better isolation effect are achieved, and the area and cost of the digital isolator circuit are reduced.

Abstract: The present invention provides an isolated power supply circuit, which includes: a transmitting unit and a receiving unit. The transmitting unit is connected with a voltage source and includes a resonant circuit and a gate voltage division circuit. The gate voltage division circuit includes: a first voltage division branch, wherein one terminal of the first voltage division branch is connected between a first inductor and an input terminal of a first MOS transistor; and a second voltage division branch, wherein one terminal of the second voltage division branch is connected between a second inductor and an input terminal of a second MOS transistor. Therefore, voltages at gates of the first MOS transistor and the second MOS transistor can be changed by regulating voltage division conditions of the first voltage division branch and the second voltage division branch.

Abstract: An electronic circuit includes parallel linear regulator circuits that support a range of different load currents. The electronic circuit includes a first linear regulator circuit coupled to an output node, a second linear regulator circuit coupled in parallel with the first linear regulator circuit and the output node, and a control circuit. The control circuit is configured to monitor the output node and to suppress or inhibit the second linear regulator circuit from supplying the output node when a representation of load power consumption is below a specified threshold. The first linear regulator circuit is configured to continue to supply a portion of the load power when the representation of load power consumption is above the specified threshold, and the control circuit may disable the second linear regulator circuit when the representation of load power consumption is below the specified threshold.

Abstract: An electronic circuit includes parallel linear regulator circuits that support a range of different load currents. The electronic circuit includes a first linear regulator circuit coupled to an output node, a second linear regulator circuit coupled in parallel with the first linear regulator circuit and the output node, and a control circuit. The control circuit is configured to monitor the output node and to suppress or inhibit the second linear regulator circuit from supplying the output node when a representation of load power consumption is below a specified threshold. The first linear regulator circuit is configured to continue to supply a portion of the load power when the representation of load power consumption is above the specified threshold, and the control circuit may disable the second linear regulator circuit when the representation of load power consumption is below the specified threshold.

Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.

Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.