Patents by Inventor Xiaohe Li

Xiaohe Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901324
    Abstract: Chip package structure is provided. The chip package structure includes: a chip, the chip including metal pins; an organic polymer material layer, the organic polymer material layer being located on a side of the metal pins away from the chip, the organic polymer material layer including a first via hole, and the organic polymer material layer including a first surface away from the chip; metal parts, at least a portion of the metal parts being located in the first via hole, the metal parts and metal pins being electrically connected, the metal parts including a second surface away from the chip, and the second surface and the first surface being flush to each other; and an encapsulating layer, the encapsulating layer being located on a side of the metal parts away from the organic polymer material layer.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: February 13, 2024
    Assignee: Shanghai AVIC OPTO Electronics Co., Ltd.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui
  • Patent number: 11880108
    Abstract: The present application discloses a display device, a method for controlling the display device, and an electronic device. The display device includes: a first panel and a second panel sequentially stacked along a direction opposite to a light-emitting direction, wherein: the first panel includes first sub-pixels, the second panel includes second sub-pixels; each first sub-pixel is provided with a first electrode, the first electrode has a first extension part, and each second sub-pixel is provided with a second electrode, the second electrode has a second extension part; and in the first panel, first extension parts of first electrodes of at least two adjacent first sub-pixels are arranged in different forms; and/or, in the second panel, second extension parts of second electrodes of at least two adjacent second sub-pixels are arranged in different forms.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: January 23, 2024
    Assignee: SHANGHAI TIANMA MICROELECTRONICS CO., LTD.
    Inventors: Anran Song, Yaqin Liao, Xiaohe Li, Jian Zhao, Chunli Ning
  • Publication number: 20230418115
    Abstract: The present application discloses a display device, a method for controlling the display device, and an electronic device. The display device includes: a first panel and a second panel sequentially stacked along a direction opposite to a light-emitting direction, wherein: the first panel includes first sub-pixels, the second panel includes second sub-pixels; each first sub-pixel is provided with a first electrode, the first electrode has a first extension part, and each second sub-pixel is provided with a second electrode, the second electrode has a second extension part; and in the first panel, first extension parts of first electrodes of at least two adjacent first sub-pixels are arranged in different forms; and/or, in the second panel, second extension parts of second electrodes of at least two adjacent second sub-pixels are arranged in different forms.
    Type: Application
    Filed: September 21, 2022
    Publication date: December 28, 2023
    Applicant: Shanghai Tianma Microelectronics Co., Ltd.
    Inventors: Anran SONG, Yaqin LIAO, Xiaohe LI, Jian ZHAO, Chunli NING
  • Publication number: 20230178411
    Abstract: Provided are a display panel and a transfer method. The display panel includes: an array substrate, where the array substrate includes a base substrate, and the base substrate comprises a plurality of sub-pixel setting regions arranged in an array; an insulating layer located on a side of the pixel driving circuit array facing away from the base substrate, where the pixel driving circuit array includes pixel driving circuits arranged in an array; the insulating layer forms accommodating grooves respectively within the plurality of sub-pixel setting regions; and the pixel driving circuits are disposed in one-to-one correspondence with the accommodating grooves; and data lines and heating lines, where each of the data lines is electrically connected to a respective column of pixel driving circuits among a plurality of columns of pixel driving circuits arranged in the array.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Jian ZHAO, Xiaohe LI, Haoxu HU
  • Patent number: 11646272
    Abstract: Packaging method for forming the panel-level chip device is provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: May 9, 2023
    Assignee: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui
  • Patent number: 11594442
    Abstract: Provided are a transfer substrate, a display panel and a transfer method. The transfer substrate includes a plurality of object setting regions arranged in an array, the plurality of object setting regions including n types, where n is a positive integer, and n?2. The transfer substrate further includes: a base substrate, and a blocking layer located on a side of the base substrate. The blocking layer forms accommodating grooves respectively within object setting regions. Phase change materials are provided in accommodating grooves of at least (n?1) types of object setting regions. The provided transfer substrate has a simple structure and high transfer efficiency.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 28, 2023
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Jian Zhao, Xiaohe Li, Haoxu Hu
  • Publication number: 20220270555
    Abstract: A panel and its drive method are provided. The panel includes: a substrate, an array layer and an electrode array layer, where the array layer is on a side of the substrate; the electrode array layer is on a side of the array layer away from the substrate; and the array layer includes an active layer, a gate metal layer and a source/drain metal layer; the substrate includes a plurality of drive units arranged in an array, a plurality of scan line groups and a plurality of data line groups; the scan line group includes first scan lines and second scan lines adjacent to the first scan lines, extending in a first direction; and the data line group includes first data lines and second data lines adjacent to the first data lines, extending in a second direction.
    Type: Application
    Filed: April 29, 2022
    Publication date: August 25, 2022
    Inventors: Kerui XI, Xiaohe LI, Feng QIN, Jine LIU, Tingting CUI, Baiquan LIN
  • Patent number: 11376585
    Abstract: A drive circuit and its drive method, and a panel and its drive method are provided. The drive circuit includes a step-up unit, a plurality of signal input terminals and a signal output terminal. The step-up unit includes a first module, a second module and a first capacitor. The first module is configured to transmit a signal of a third signal input terminal to a first electrode of the first capacitor. The second module is configured to transmit a signal of a fourth signal input terminal to a second electrode of the first capacitor at a first time period which generates a voltage difference between two electrodes of the first capacitor, and to transmit the signal of the fourth signal input terminal to the second electrode of the first capacitor at a second time period which further increases a signal of the first electrode of the first capacitor.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: July 5, 2022
    Assignee: Shanghai AVIC OPTO Electronics Co., Ltd.
    Inventors: Kerui Xi, Xiaohe Li, Feng Qin, Jine Liu, Tingting Cui, Baiquan Lin
  • Patent number: 11318465
    Abstract: An electrowetting panel includes a base substrate; an electrode array layer, including a plurality of electrodes arranged into an array; an insulating hydrophobic layer; a microfluidic channel layer located on the base substrate. Each electrode of the plurality of electrodes is connected to a driving circuit, and a droplet can move along a first direction by applying an electric voltage on each electrode. The insulating hydrophobic layer is located on the electrode array layer, and the microfluidic channel layer is located on the insulating hydrophobic layer. The electrodes includes a plurality of driving electrodes and a plurality of detecting electrodes. Along the first direction, a number N of the driving electrodes is located between every two adjacent detecting electrodes, where N is a natural number. The electrowetting panel also includes a detecting chip electrically connected to the detecting electrodes.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: May 3, 2022
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Baiquan Lin, Kerui Xi, Junting Ouyang, Jinyu Li, Xiaohe Li
  • Publication number: 20220084973
    Abstract: Chip package structure is provided. The chip package structure includes: a chip, the chip including metal pins; an organic polymer material layer, the organic polymer material layer being located on a side of the metal pins away from the chip, the organic polymer material layer including a first via hole, and the organic polymer material layer including a first surface away from the chip; metal parts, at least a portion of the metal parts being located in the first via hole, the metal parts and metal pins being electrically connected, the metal parts including a second surface away from the chip, and the second surface and the first surface being flush to each other; and an encapsulating layer, the encapsulating layer being located on a side of the metal parts away from the organic polymer material layer.
    Type: Application
    Filed: October 20, 2021
    Publication date: March 17, 2022
    Inventors: Kerui XI, Feng QIN, Jine LIU, Xiaohe LI, Tingting CUI
  • Patent number: 11257765
    Abstract: Chip package structure and chip package method are provided. The chip package structure includes an encapsulating layer, a redistribution layer, a soldering pad group, and bare chips. Connecting posts is formed on a side of the bare chips. The encapsulating layer covers the bare chips and the connecting posts, while exposes a side of the connecting posts away from the bare chips. The redistribution layer on the connecting posts includes a first redistribution wire, a second redistribution wire, and a third redistribution wire. The first redistribution wire and the second redistribution wire are electrically connected to at least one connecting post respectively, and the third redistribution layer is electrically connected to remaining connecting posts. The soldering pad group on the redistribution layer includes an input soldering pad electrically connected to the first redistribution wire and an output soldering pad electrically connected to the second redistribution wire.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: February 22, 2022
    Assignee: Shanghai AVIC OPTO Electronics Co., Ltd.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui, Yuan Ding
  • Patent number: 11222907
    Abstract: In an array substrate, an electronic paper display panel and a drive method thereof, and a display device, a display area includes multiple sub-display areas. A plurality of scanning lines in each sub-display area are electrically insulated from each other, corresponding scanning lines in different sub-display areas are electrically connected to each other and display time of each sub-display area is controlled through control signal lines. When a control chip and a flexible circuit board are employed, only a small number of control chips and/or flexible circuit boards, or even only one control chip and/or one flexible circuit board, may drive multiple sub-display areas to display pictures.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: January 11, 2022
    Assignee: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.
    Inventors: Kerui Xi, Tingting Cui, Feng Qin, Jine Liu, Xiaohe Li
  • Patent number: 11215897
    Abstract: Provided are an array substrate, an electronic paper display panel and a drive method thereof and a display device. A display area includes a plurality of sub-display areas, a plurality of data lines in each sub-display area are electrically insulated from each other, corresponding data lines in different sub-display areas are electrically connected to each other, and a control signal line is configured to control display time of each sub-display area. When a control chip and a flexible circuit board are employed, only a small number of control chips and flexible circuit boards may drive the plurality of sub-display areas to display pictures.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: January 4, 2022
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Zuzhao Xu, Kerui Xi, Baiquan Lin, Xiaohe Li, Jine Liu, Feng Qin, Qiongqin Mao, Tinghai Wang, Mingwei Zhang
  • Patent number: 11183463
    Abstract: Chip package method and chip package structure are provided. The chip package method includes: providing a transparent substrate including a first side and a second side; coating the first side of the transparent substrate with an organic polymer material layer; depositing a protective layer on the organic polymer material layer; forming alignment parts on the protective layer; attaching a plurality of chips including metal pins; forming an encapsulating layer on the protective layer; polishing the encapsulating layer to expose the metal pins; forming a first insulating layer; forming first through holes in the first insulating layer; forming metal parts extending along sidewalls of the first through holes; and irradiating the second side of the transparent substrate by a laser to lift off the transparent substrate. The metal parts are insulated from each other and electrically connected to the metal pins.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 23, 2021
    Assignee: Shanghai AVIC OPTO Electronics Co., Ltd.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui
  • Publication number: 20210280525
    Abstract: Packaging method for forming the panel-level chip device is provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 9, 2021
    Inventors: Kerui XI, Feng QIN, Jine LIU, Xiaohe LI, Tingting CUI
  • Patent number: 11103869
    Abstract: A microfluidic chip, a method for driving a microfluidic chip and an analysis apparatus are provided. An exemplary microfluidic chip includes a substrate; a number of M driving electrodes disposed on a side of the substrate and arranged along a first direction; and a number of N signal terminals electrically connected to the number of M driving electrodes. Any three adjacent driving electrodes are connected to different signal terminals, respectively; a number of A of the number of M driving electrodes are connected to a same signal terminal; and M, N and A are positive integers, and M?4, N?3, M>N, and A?2.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: August 31, 2021
    Assignee: Shanghai AVIC OPTO Electronics Co., Ltd.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui
  • Patent number: 11081506
    Abstract: A display component and a display device are provided. The display component includes a display panel including a first substrate, a thin-film transistor array layer, a second substrate and a coil-containing film layer. The coil-containing film layer at least includes a first metal layer, a first insulation layer, a second metal layer, and a second insulation layer. The first metal layer includes at least one first coil and the second metal layer includes at least one signal line, where the one first coil of the first metal layer is electrically connected to one or two signal lines of the second metal layer. An orthographic projection of the first coil on the first substrate is at least partially in the display region. The display component further includes a coil drive circuit, where the coil drive circuit is electrically connected to each of the first coil and the signal line, respectively.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: August 3, 2021
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Baiquan Lin, Kerui Xi, Junting Ouyang, Qiongqin Mao, Feng Qin, Jine Liu, Xiangjian Kong, Xiaohe Li
  • Patent number: 11056437
    Abstract: A panel-level chip device and a packaging method for forming the panel-level chip device are provided. The panel-level chip device includes a plurality of first bare chips disposed on a supporting base, and a plurality of first connection pillars. The panel-level chip device also includes a first encapsulation layer, and a first redistribution layer. The first redistribution layer includes a plurality of first redistribution elements and a plurality of second redistribution elements. Further, the panel-level chip device includes a solder ball group including a plurality of first solder balls. First connection pillars having a same electrical signal are electrically connected to each other by a first redistribution element. Each of remaining first connection pillars is electrically connected to one second redistribution element. The one second redistribution element is further electrically connected to a first solder ball of the plurality of first solder balls.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 6, 2021
    Assignee: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.
    Inventors: Kerui Xi, Feng Qin, Jine Liu, Xiaohe Li, Tingting Cui
  • Patent number: 10989973
    Abstract: A 3D printed display panel includes two opposing substrates and a black matrix formed on one of the substrates. The light proof areas of the black matrix include multiple first portions, multiple second portions and multiple third portions arranged to form a grid structure. The first portions and the third portions are alternately arranged in a direction of the scanning lines, the second portions and the third portions are alternately arranged in a direction of the data lines. Meshes of the grid structure are aperture zones of the black matrix. The aperture zones are in one-to-one correspondence with the pixel units. A vertical projections of the scanning lines and the data lines on the second substrate are located in the lightproof areas; where a minimum width of one first portion is X, a minimum width of one second portion is Y, and |X?Y|?2 ?m.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: April 27, 2021
    Assignee: SHANGHAI AVIC OPTO ELECTRONICS CO., LTD.
    Inventors: Kerui Xi, Chen Wang, Feng Qin, Xiaohe Li, Jine Liu, Tingting Cui
  • Publication number: 20210013083
    Abstract: Provided are a transfer substrate, a display panel and a transfer method. The transfer substrate includes a plurality of object setting regions arranged in an array, the plurality of object setting regions including n types, where n is a positive integer, and n?2. The transfer substrate further includes: a base substrate, and a blocking layer located on a side of the base substrate. The blocking layer forms accommodating grooves respectively within object setting regions. Phase change materials are provided in accommodating grooves of at least (n?1) types of object setting regions. The provided transfer substrate has a simple structure and high transfer efficiency.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Jian ZHAO, Xiaohe Li, Haoxu Hu