Abstract: A semiconductor device and a method for manufacturing the same. The semiconductor device includes: a first gate-all-around (GAA) transistor disposed in the first region, including a first nanowire or nanosheet of at least one first layer, the at least one first layer and the substrate form a first group, among which all pairs of adjacent layers are separated by first distances, respectively; and a second GAA transistor disposed in the second region, including a second nanowire or nanosheet of at least two second layers, the at least two second layers and the substrate form a second group, among which the second layers are separated by second distances, respectively; where a minimum first distance is greater than a maximum second distance, and a quantity of the at least one first layer is less than a quantity of the at least two second layers.

Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a substrate and a channel portion. The channel portion includes a first portion including a fin-shaped structure protruding with respect to the substrate and a second portion located above the first portion and spaced apart from the first portion. The second portion includes one or more nanowires or nanosheets spaced apart from each other. Source/drain portions are arranged on two opposite sides of the channel portion in a first direction and in contact with the channel portion. A gate stack extends on the substrate in a second direction intersecting with the first direction, so as to intersect with the channel portion.

Abstract: A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.

Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.

Abstract: A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.

Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.