Patents by Inventor Xiaohua Fan
Xiaohua Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240111722Abstract: Deleting directories in a virtual distributed file system (VDFS), and non-virtual file systems, involves changing the name of a selected directory to a unique object identifier (UID) and moving the selected directory, named according to the UID, to a deletion target directory. A recursive process, implemented using a background deletion thread, starts in the current directory and identifies objects in the current directory. For an object that is a file or an empty directory, the object is added to a deletion queue. For an object that is a directory that is not empty, the recursion drops down into that directory as the new current directory. When the recursion has exhausted the selected directory, or some maximum object count has been reached, the objects identified in the deletion queue are deleted. This approach can also be used for file operations other than deletion, such as compression, encryption, and hashing.Type: ApplicationFiled: November 21, 2022Publication date: April 4, 2024Inventors: Xiaohua FAN, Zhaohui GUO, Wenguang WANG, Kiran PATIL, Abhay Kumar JAIN
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Publication number: 20240021821Abstract: The present disclosure relates to a graphite negative electrode material and a preparation method thereof and a lithium ion battery, wherein the graphite negative electrode material includes spherical graphite and a carbon coating layer, the carbon coating layer includes an M element-containing modifying group, where M is at least one selected from the group consisting of B, N, and P. The preparation method of a graphite negative electrode material includes performing a thermal polymerization treatment on a mixture containing spherical graphite, a coating agent, and a modifying additive, to obtain a precursor, wherein modifying additive includes an element M-containing compound, and M is at least one selected from the group consisting of B, N, and P; and performing a carbonization treatment on the precursor under a protective atmosphere, to obtain the graphite negative electrode material.Type: ApplicationFiled: September 25, 2023Publication date: January 18, 2024Inventors: Xuan Wu, Xiaohua Fan, Haihui Zhou, Jianguo Ren, Xueqin He
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Publication number: 20220189615Abstract: A decentralized method for generation and management of health monitoring related tasks in a hyperconverged infrastructure (HCl) environment is provided. The hosts in the HCl environment each include a health agent and a task manager. The health agent collects health results from health checks and stores the health results in a shared database that is shared by the hosts. The task manager generates a health monitoring related task in response to the health results being indicative of a change in health status, and stores the health monitoring related task in a task pool that is also shared by the hosts. Any of the hosts can obtain and execute the health monitoring related tasks in the task pool based on a task priority and load balancing criteria.Type: ApplicationFiled: January 28, 2021Publication date: June 16, 2022Applicant: VMware, Inc.Inventors: Xiang YU, Yu WU, Yang YANG, Sifan LIU, Jin FENG, Xiaohua FAN
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Patent number: 11150993Abstract: Computerized techniques involve dividing a plurality of entries included in an indirect block of an inode into a plurality of entry groups. Each non-null entry of the plurality of entries has one of a pointer pointing to an associated data block and an identifier specific to a byte pattern of an associated data block. The techniques further involve determining, for an entry group of the plurality of entry groups, whether entries having an identifier in the entry group all have a same predetermined identifier. The techniques further involve in response to determining that the entries having an identifier in the entry group all have the same predetermined identifier, identifying the entry group as recoverable if the indirect block is corrupted. Such techniques improve reliability and performance of a storage system.Type: GrantFiled: January 16, 2019Date of Patent: October 19, 2021Assignee: EMC IP Holding Company LLCInventors: Leihu Zhang, Xiaohua Fan, Hao Fang, Chen Gong, Ming Zhang
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Patent number: 10545671Abstract: A method, computer program product, and computer system for receiving, at a computing device, an I/O request directed to a compressed data portion of a storage system. It may be determined whether the I/O request includes one of a first portion of information and a second portion of information. An address of the compressed data portion may be obtained via downward mapping if the I/O request includes the first portion of information. The address of the compressed data portion may be obtained via upward mapping if the I/O request includes the second portion of information. The I/O request may be executed at the compressed data portion.Type: GrantFiled: July 31, 2017Date of Patent: January 28, 2020Assignee: EMC IP Holding Company, LLCInventors: Xiaohua Fan, Yaming Kuang, Walter Forrester
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Publication number: 20190220363Abstract: Computerized techniques involve dividing a plurality of entries included in an indirect block of an inode into a plurality of entry groups. Each non-null entry of the plurality of entries has one of a pointer pointing to an associated data block and an identifier specific to a byte pattern of an associated data block. The techniques further involve determining, for an entry group of the plurality of entry groups, whether entries having an identifier in the entry group all have a same predetermined identifier. The techniques further involve in response to determining that the entries having an identifier in the entry group all have the same predetermined identifier, identifying the entry group as recoverable if the indirect block is corrupted. Such techniques improve reliability and performance of a storage system.Type: ApplicationFiled: January 16, 2019Publication date: July 18, 2019Inventors: Leihu Zhang, Xiaohua Fan, Hao Fang, Chen Gong, Ming Zhang
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Patent number: 10114731Abstract: An improved method of analyzing software issues may include retrieving and storing selected data elements from the operating system kernel data prior to performing a memory dump. The method of retrieving the selected kernel data may include creating a thread dedicated to collecting the data and storing it in a memory location for analysis after the memory dump. The operating system kernel data may be analyzed in conjunction with the prior art dump data to identify a root cause of the software issue.Type: GrantFiled: December 23, 2014Date of Patent: October 30, 2018Assignee: EMC IP Holding Company LLCInventors: Xiaohua Fan, Feng Yin, Xiaogang Wang, Dazhi Dong, Binhua Lu
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Patent number: 9329805Abstract: A method of verifying that a storage system is complying with best practices guide includes a software program running in host servers for determining the host server configuration parameters, and comparing the host server configuration to the storage system configuration. If a newly added best practices rule is found to be different than either the current configuration of the storage system or the host server configuration, then an alert may be generated, and sent to a storage system user or manager. In addition, a suggested change notice may be generated and transmitted to the storage system user or manager. There may also be a suggested change notice sent to the host server. Best practices rules may be stored in a data base and updated frequently.Type: GrantFiled: December 24, 2013Date of Patent: May 3, 2016Assignee: EMC CorporationInventors: Xiaohua Fan, Qin Tao, Yuanjie Wu, Xiaogang Wang, Dazhi Dong
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Patent number: 9166632Abstract: A receiver including a mixer, a clock generator, a plurality of capacitances, a plurality of resistances, and a controller. The mixer includes a plurality of switches. The clock generator is configured to generate clock signals to drive the plurality of switches of the mixer. The plurality of capacitances couples the clock signals to respective inputs of the plurality of switches. The plurality of resistances couples to the respective inputs of the plurality of switches. The controller is configured to output a first signal to the plurality of resistances. The first signal determines one or more attributes of the clock signals. One or more switching characteristics of the plurality of switches of the mixer are based on the one or more attributes of the clock signals.Type: GrantFiled: June 10, 2014Date of Patent: October 20, 2015Assignee: Marvell International LTD.Inventors: Gregory Uehara, Brian Brunn, Xiaohua Fan, Sehat Sutardja
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Publication number: 20150186246Abstract: An improved method of analyzing software issues may include retrieving and storing selected data elements from the operating system kernel data prior to performing a memory dump. The method of retrieving the selected kernel data may include creating a thread dedicated to collecting the data and storing it in a memory location for analysis after the memory dump. The operating system kernel data may be analyzed in conjunction with the prior art dump data to identify a root cause of the software issue.Type: ApplicationFiled: December 23, 2014Publication date: July 2, 2015Inventors: Xiaohua Fan, Feng Yin, Xiaogang Wang, Dazhi Dong, Binhua Lu
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Patent number: 9042859Abstract: A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.Type: GrantFiled: July 8, 2013Date of Patent: May 26, 2015Assignee: Marvell World Trade Ltd.Inventors: Gregory Uehara, Xiaohua Fan
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Patent number: 8750437Abstract: A receiver including a mixer configured to generate (i) a first output and (ii) a second output, a first capacitance coupled to the first output, and a second capacitance coupled to the second output, A controller is configured to program (i) the first capacitance and (ii) the second capacitance to a first capacitance value in response to operating the receiver in a first mode, and program (i) the first capacitance and (ii) the second capacitance to a second capacitance value in response to operating the receiver in a second mode. The first capacitance value determines one or more of (i) linearity, (ii) gain, and (iii) noise figure of the receiver in the first mode. The second capacitance value determines one or more of (i) linearity, (ii) gain, and (iii) noise figure of the receiver in the second mode.Type: GrantFiled: March 25, 2013Date of Patent: June 10, 2014Assignee: Marvell International Ltd.Inventors: Gregory Uehara, Brian Brunn, Xiaohua Fan, Sehat Sutardja
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Patent number: 8688055Abstract: An amplifier integrated circuit (IC) including a push-pull amplifier having a push stage and a pull stage. A first loop of wire configured to form a first degeneration inductance of the push stage. A second loop of wire configured to form a first degeneration inductance of the pull stage. The first loop and the second loop are concentric. The first loop is connected to a reference potential. The second loop is connected to a supply voltage.Type: GrantFiled: December 28, 2012Date of Patent: April 1, 2014Assignee: Marvell World Trade Ltd.Inventors: Brian T. Brunn, Sehat Sutardja, Xiaohua Fan, Gregory T. Uehara
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Publication number: 20130293303Abstract: A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.Type: ApplicationFiled: July 8, 2013Publication date: November 7, 2013Inventors: Gregory UEHARA, Xiaohua Fan
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Patent number: 8483645Abstract: A circuit includes first and second transconductance stages each having an input to receive a signal, and a current combiner circuit coupled to outputs of the first and second transconductance stages. The current combiner circuit forms a path from the first transconductance stage to (i) one of a plurality of output paths or (ii) multiple output paths of the output paths. The current combiner circuit severs the second transconductance stage from the output paths when the first transconductance stage forms a path to one of the output paths. The current combiner circuit forms a path from the second transconductance stage to the multiple output paths when the first transconductance stage forms a path to the multiple output paths. The current combiner circuit couples current from the first transconductance stage to (i) a first output path or a second output path or (ii) both the first and second output paths.Type: GrantFiled: March 2, 2011Date of Patent: July 9, 2013Assignee: Marvell World Trade Ltd.Inventors: Gregory Uehara, Xiaohua Fan
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Patent number: 8406358Abstract: A radio frequency (RF) apparatus has a receiver. The receiver includes a mixer, a clock generator, and a common mode controller. The clock generator couples to the mixer. The common mode controller couples to the outputs of mixer. The mixer, the clock generator and the common mode controller are operated collectively to program linearity and a gain of the receiver.Type: GrantFiled: February 17, 2009Date of Patent: March 26, 2013Assignee: Marvell International Ltd.Inventors: Gregory Uehara, Brian Brunn, Xiaohua Fan, Sehat Sutardja
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Patent number: 8346179Abstract: An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.Type: GrantFiled: May 3, 2010Date of Patent: January 1, 2013Assignee: Marvell World Trade Ltd.Inventors: Brian Brunn, Sehat Sutardja, Xiaohua Fan, Gregory Uehara
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Publication number: 20110217945Abstract: In one embodiment, the present disclosure includes a circuit comprising first and second transconductance stages that receive an RF signal and a current combiner circuit. The current combiner circuit couples current from the first transconductance stage to (i) one of a first output path or a second output path or (ii) both the first output path and second output path. The current combiner circuit decouples current from the second transconductance stage from both the first output path and second output path when the first transconductance stage couples current to one of the first output path or the second output path. The current combiner circuit couples current from the second transconductance stage to both the first output path and the second output path when the first transconductance stage couples current to both the first output path and the second output path.Type: ApplicationFiled: March 2, 2011Publication date: September 8, 2011Inventors: Gregory Uehara, Xiaohua Fan
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Publication number: 20100291881Abstract: An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.Type: ApplicationFiled: May 3, 2010Publication date: November 18, 2010Inventors: Brian Brunn, Sehat Sutardja, Xiaohua Fan, Gregory Uehara