Abstract: The present application discloses a metering device, including a structure body of the metering device, a first metering chip and a metering master control chip. The first metering chip is configured for performing fundamental wave and full wave processing on electric energy data; the metering master control chip includes a master control chip core, a coprocessor and a storage unit, wherein the master control chip core and the coprocessor share the storage unit; and the coprocessor is configured for performing harmonic processing on the electric energy data based on the storage unit and based on a manner of instruction. By applying the solution of the present application, the electric energy data of the metering device can be processed quickly and efficiently, and a hardware cost is saved at the same time. The present application also provides an electric energy meter which has the corresponding technical effects.

Abstract: The present application discloses a metering device, including a structure body of the metering device, a first metering chip and a metering master control chip. The first metering chip is configured for performing fundamental wave and full wave processing on electric energy data; the metering master control chip includes a master control chip core, a coprocessor and a storage unit, wherein the master control chip core and the coprocessor share the storage unit; and the coprocessor is configured for performing harmonic processing on the electric energy data based on the storage unit and based on a manner of instruction. By applying the solution of the present application, the electric energy data of the metering device can be processed quickly and efficiently, and a hardware cost is saved at the same time. The present application also provides an electric energy meter which has the corresponding technical effects.

Abstract: A digital signal process device includes a first kernel module, configured for generating a corresponding control signal according to a DSP instruction code in a first read-only memory; a second kernel module, configured for generating a corresponding control signal according to a DSP instruction code in a second read-only memory; an arbitration module, configured for receiving a control signal corresponding to a memory access instruction and/or an arithmetic instruction sent by the first kernel module and the second kernel module, and screening out a control signal corresponding to a target memory access instruction and/or a target arithmetic instruction according to a preset priority; a data storage module, configured for receiving the control signal corresponding to the target memory access instruction sent by the arbitration module; and an arithmetic logic unit, configured for receiving the control signal corresponding to the target arithmetic instruction sent by the arbitration module.

Abstract: A data deleting method and apparatus is provided in embodiments of this application. The method comprises: when a file system detects a delete request for a target file, examining a security property of the target file, wherein the security property of a file comprises secret classified property; if the security property of the target file is secret classified property, executing an overwrite operation on the target file and then executing a delete operation to delete the target file; wherein the overwrite operation comprises sending a write command to a SSD, the write command being a predefined write command which is expanded by adding an immediate scrubbing flag, to cause the SSD to invoke a backstage garbage collection program according to the predefined write command to immediately delete data on garbage blocks corresponding to logical block addresses of the target file.