Abstract: A method and system for analyzing over-the-air (OTA) client logs from vehicles includes receiving OTA client log files comprising error logs generated during OTA software updates, preprocessing the log files to generate cleaned log files by removing duplicated log lines and standardizing formats, segmenting the cleaned log files into log chunks, and analyzing the chunks using both rule-based and artificial intelligence (AI) approaches. The AI analysis includes generating vector embeddings for error-related log lines, comparing embeddings with an insignificant error database to filter out insignificant errors, retrieving error context information from a vector database, and generating error summaries using a large language model. The system displays analysis results via a failure analysis engineer (FAE) review interface and updates databases based on FAE feedback.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers by iteratively comparing the vector of two or more maximum available resources with a vector of a current average resource residual, taking a minimum between those vectors as a running tally for the individual resource requests, and recalculating the current average resource residual.

Abstract: Systems and methods are provided for a quality of service management (QoS) of a telematics control unit (TCU) of a vehicle. The quality of service management system includes a classification machine learning model adapted to receive TCU behavior parameters and environment parameters and output a usage scenario and QoS level according to the TCU behavior parameters and the environment parameters.

Abstract: A device includes a parallel processor and a context switch scheduling circuit that is part of or separate from the parallel processor. The parallel processor is configured to execute requests from a plurality of virtual functions. The context switch scheduling circuit is configured to, responsive to a first virtual function of the plurality of virtual functions becoming idle during a first time slice at the parallel processor, perform a context switch for a second virtual function of the plurality of virtual functions before expiration of the first time slice, and assign a second time slice at the parallel processor to the second virtual function.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers by iteratively comparing the vector of two or more maximum available resources with a vector of a current average resource residual, taking a minimum between those vectors as a running tally for the individual resource requests, and recalculating the current average resource residual.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers based on a classification number. Any resource provider having a maximum available resource less than or equal to the classification number may be assigned an individual resource request equal to their corresponding maximum available resource.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers based on a classification number. Any resource provider having a maximum available resource less than or equal to the classification number may be assigned an individual resource request equal to their corresponding maximum available resource.

Abstract: Methods and systems for selecting between single-process and multi-process implementation flows involve identifying features of a circuit design by a design tool. A classification model is applied to the features. The classification model indicates whether an implementation flow on the circuit design is likely to have a runtime within a first range of runtimes or a runtime within a second range of runtimes. The implementation flow is executed by the design tool in a single process in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the first range of runtimes. The implementation flow is executed by the design tool in a plurality of processes in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the second range of runtimes.

Abstract: According to one aspect, a system for resource management may perform receiving a total resource request, a vector of two or more maximum available resources associated with two or more corresponding resource providers, and a number of resource providers and calculating an individual resource request for each of the two or more resource providers by iteratively comparing the vector of two or more maximum available resources with a vector of a current average resource residual, taking a minimum between those vectors as a running tally for the individual resource requests, and recalculating the current average resource residual.

Abstract: This invention relates generally to cyanine-containing compounds; pharmaceutical compositions comprising cyanine-containing compounds; and methods of using cyanine-containing compounds for cancer cell imaging, cancer cell growth inhibition, and detecting cancer cells, for example. Compounds of the invention are preferentially taken up by cancer cells as compared to normal cells. This allows many uses in the cancer treatment, diagnosis, tracking and imaging fields.

Abstract: The present invention describes small molecule ligand-drug conjugates and methods of using the small molecule ligand-drug conjugates for targeted treatment of cancer in a patient in need thereof. Further described are methods of sterilizing circulating tumor cells and determining drug concentration in cancer tissue.

Abstract: A method of FPGA compilation for an emulation system includes receiving a netlist for an FPGA, partitioning the netlist into a set of sub-FPGA netlists, and mapping each of the sub-FPGA netlists in the set to a corresponding dynamic sub-FPGA region of the FPGA. The method further includes implementing the sub-FPGA netlists of the set in parallel to obtain a corresponding set of sub-FPGA bitstreams.

Abstract: The present disclosure provides a chip transfer substrate, a chip transfer device and a chip transfer method. The chip transfer substrate includes a substrate, a plurality of bases spaced apart from each other on the substrate, the plurality of bases being configured to carry micro light emitting diodes (Micro LEDs) to be transferred and being movable on the substrate; and a plurality of distance adjusting components each arranged between two adjacent bases and configured to adjust a distance between the two adjacent bases.

Abstract: A plastic frame includes a first frame having a first frame surface and a first end portion and a second end portion opposite to each other, and a second frame having a second frame surface, an end portion of the second frame being connected to the first end portion of the first frame. The first frame surface and the second frame surface are located on the same side of the plastic frame. A first height difference between the first frame surface at a first end portion of the first frame and the second frame surface is smaller than a height difference between the first frame surface at a middle portion of the first frame and the second frame surface. The first height difference may be, for example, 0.1-0.3 mm.

Abstract: A connector has a housing configured to mate with a second housing, a pair of slide members movably mounted on the housing, and a lever pivotably attached to the housing and slidably coupled to the slide members. Each slide member has a cam groove in a side surface which provides an angled lead-in surface into the cam groove and cam surfaces engageable with a cam follower post of the second housing. A blocking shoulder partially blocking an opening of the cam groove to prevent entry of the cam follower post unless the cam follower post is in a correct position. When the cam follower post engages the angled lead-in surface, this provides a visual and tactile indication to a user that the connector is ready to be mated with the second housing.

Abstract: A plastic frame includes a first frame having a first frame surface and a first end portion and a second end portion opposite to each other, and a second frame having a second frame surface, an end portion of the second frame being connected to the first end portion of the first frame. The first frame surface and the second frame surface are located on the same side of the plastic frame. A first height difference between the first frame surface at a first end portion of the first frame and the second frame surface is smaller than a height difference between the first frame surface at a middle portion of the first frame and the second frame surface. The first height difference may be, for example, 0.1-0.3 mm.

Abstract: Methods and apparatus are described for providing and using programmable ICs suitable for meeting the unique desires of large hardware emulation systems. One example method of classifying a programmable IC having impaired circuitry generally includes determining a partitioning of programmable logic resources into two or more groups for classifying the programmable IC, testing the programmable IC to determine at least one location of the impaired circuitry in the programmable logic resources of the programmable IC, and classifying the programmable IC based on the at least one location of the impaired circuitry in relation to the partitioning of the programmable logic resources.

Abstract: The present disclosure provides a chip transfer substrate, a chip transfer device and a chip transfer method. The chip transfer substrate includes a substrate, a plurality of bases spaced apart from each other on the substrate, the plurality of bases being configured to carry micro light emitting diodes (Micro LEDs) to be transferred and being movable on the substrate; and a plurality of distance adjusting components each arranged between two adjacent bases and configured to adjust a distance between the two adjacent bases.

Abstract: A connector has a housing configured to mate with a second housing, a pair of slide members movably mounted on the housing, and a lever pivotably attached to the housing and slidably coupled to the slide members. Each slide member has a cam groove in a side surface which provides an angled lead-in surface into the cam groove and cam surfaces engageable with a cam follower post of the second housing. A blocking shoulder partially blocking an opening of the cam groove to prevent entry of the cam follower post unless the cam follower post is in a correct position. When the cam follower post engages the angled lead-in surface, this provides a visual and tactile indication to a user that the connector is ready to be mated with the second housing.

Abstract: The disclosed approaches involve evaluating by a design tool executing on a computer system, a plurality of nets of a circuit design for individual levels of suitability for cutting each net into a cut net that crosses a partition boundary between a plurality of partitions of an integrated circuit (IC) device. The design tool partitions the circuit design. The partitioning includes cutting one or more of the nets into cut nets and favoring the cutting of ones of the plurality of nets having a greater level of suitability over others of the plurality of nets having a lesser level of suitability. The design tool assigns each cut net to one group of a plurality of groups and inserts respective time-division multiplexing circuitry on each group of cut nets. The design toon then places the circuit design on the IC device.