Patents by Inventor Xiaojie Xue
Xiaojie Xue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968646Abstract: Wireless communications systems and methods related to communicating control information are provided. A method of wireless communication performed by a user equipment (UE) may include sensing an interference level of at least one frequency, selecting, based on the interference level, a frequency, and communicating sidelink control information (SCI) in the selected frequency.Type: GrantFiled: June 25, 2021Date of Patent: April 23, 2024Assignee: QUALCOMM IncorporatedInventors: Yisheng Xue, Xiaojie Wang, Jing Sun, Chih-Hao Liu, Xiaoxia Zhang
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Patent number: 11950222Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a configuration that indicates multiple time intervals corresponding to multiple physical sidelink shared channels (PSSCHs) within a slot, wherein at least one PSSCH, of the multiple PSSCHs, starts in a symbol other than an initial data symbol of the slot. The UE may communicate in one or more PSSCHs, of the multiple PSSCHs, within the slot based at least in part on the configuration. Numerous other aspects are described.Type: GrantFiled: June 1, 2021Date of Patent: April 2, 2024Assignee: QUALCOMM IncorporatedInventors: Chih-Hao Liu, Yisheng Xue, Jing Sun, Xiaoxia Zhang, Tao Luo, Sony Akkarakaran, Xiaojie Wang, Lik Hang Silas Fong, Piyush Gupta
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Patent number: 10490510Abstract: An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.Type: GrantFiled: August 7, 2017Date of Patent: November 26, 2019Assignee: ANALOG DEVICES, INC.Inventors: Xiaojie Xue, Dipak Sengupta
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Patent number: 10287161Abstract: An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.Type: GrantFiled: April 6, 2016Date of Patent: May 14, 2019Assignee: ANALOG DEVICES, INC.Inventors: Xiaojie Xue, Michael J. Zylinski, Thomas M. Goida, Kathleen O. O'Donnell
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Publication number: 20180047675Abstract: An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.Type: ApplicationFiled: August 7, 2017Publication date: February 15, 2018Inventors: Xiaojie Xue, Dipak Sengupta
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Patent number: 9728510Abstract: An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.Type: GrantFiled: November 25, 2015Date of Patent: August 8, 2017Assignee: ANALOG DEVICES, INC.Inventors: Xiaojie Xue, Dipak Sengupta
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Patent number: 9698127Abstract: An integrated device die and package is disclosed. The integrated device die includes a unitary body. The unitary body can have an upper portion comprising one or more active components. The upper portion can have first and second opposing lateral sides defining at least a portion of a periphery of the upper portion such that an upper surface of the upper portion is disposed between upper edges of the first and second opposing lateral sides. The unitary body can also have a lower portion monolithically formed with the upper portion. The lower portion can comprise a pedestal extending downwardly from the upper portion. The pedestal can be laterally inset from lower edges of the first and second opposing lateral sides. The pedestal can include a distal end portion configured to couple to a carrier.Type: GrantFiled: May 13, 2016Date of Patent: July 4, 2017Assignee: ANALOG DEVICES, INC.Inventors: Thomas M. Goida, Xiaojie Xue
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Publication number: 20170022051Abstract: An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.Type: ApplicationFiled: April 6, 2016Publication date: January 26, 2017Inventors: Xiaojie Xue, Michael J. Zylinski, Thomas M. Goida, Kathleen O. O'Donnell
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Publication number: 20160336297Abstract: An integrated device die and package is disclosed. The integrated device die includes a unitary body. The unitary body can have an upper portion comprising one or more active components. The upper portion can have first and second opposing lateral sides defining at least a portion of a periphery of the upper portion such that an upper surface of the upper portion is disposed between upper edges of the first and second opposing lateral sides. The unitary body can also have a lower portion monolithically formed with the upper portion. The lower portion can comprise a pedestal extending downwardly from the upper portion. The pedestal can be laterally inset from lower edges of the first and second opposing lateral sides. The pedestal can include a distal end portion configured to couple to a carrier.Type: ApplicationFiled: May 13, 2016Publication date: November 17, 2016Inventors: Thomas M. Goida, Xiaojie Xue
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Publication number: 20160300781Abstract: An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.Type: ApplicationFiled: November 25, 2015Publication date: October 13, 2016Inventors: Xiaojie Xue, Dipak Sengupta
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Patent number: 9343367Abstract: An integrated device die and package is disclosed. The integrated device die includes a unitary body. The unitary body can have an upper portion comprising one or more active components. The upper portion can have first and second opposing lateral sides defining at least a portion of a periphery of the upper portion such that an upper surface of the upper portion is disposed between upper edges of the first and second opposing lateral sides. The unitary body can also have a lower portion monolithically formed with the upper portion. The lower portion can comprise a pedestal extending downwardly from the upper portion. The pedestal can be laterally inset from lower edges of the first and second opposing lateral sides. The pedestal can include a distal end portion configured to couple to a carrier.Type: GrantFiled: December 19, 2014Date of Patent: May 17, 2016Assignee: ANALOG DEVICES, INC.Inventors: Thomas M. Goida, Xiaojie Xue
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Patent number: 9278851Abstract: Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads.Type: GrantFiled: September 11, 2014Date of Patent: March 8, 2016Assignee: ANALOG DEVICES, INC.Inventor: Xiaojie Xue
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Patent number: 9209121Abstract: Various embodiments of an integrated device package are disclosed herein. The package may include a leadframe having a first side and a second side opposite the first side. The leadframe can include a plurality of leads surrounding a die mounting region. A first package lid may be mounted on the first side of the leadframe to form a first cavity, and a first integrated device die may be mounted on the first side of the leadframe within the first cavity. A second integrated device die can be mounted on the second side of the leadframe. At least one lead of the plurality of leads can provide electrical communication between the first integrated device die and the second integrated device die.Type: GrantFiled: February 1, 2013Date of Patent: December 8, 2015Assignee: ANALOG DEVICES, INC.Inventors: Thomas M. Goida, Xiaojie Xue
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Publication number: 20150181697Abstract: An integrated device die and package is disclosed. The integrated device die includes a unitary body. The unitary body can have an upper portion comprising one or more active components. The upper portion can have first and second opposing lateral sides defining at least a portion of a periphery of the upper portion such that an upper surface of the upper portion is disposed between upper edges of the first and second opposing lateral sides. The unitary body can also have a lower portion monolithically formed with the upper portion. The lower portion can comprise a pedestal extending downwardly from the upper portion. The pedestal can be laterally inset from lower edges of the first and second opposing lateral sides. The pedestal can include a distal end portion configured to couple to a carrier.Type: ApplicationFiled: December 19, 2014Publication date: June 25, 2015Inventors: Thomas M. Goida, Xiaojie Xue
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Publication number: 20140374854Abstract: Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads.Type: ApplicationFiled: September 11, 2014Publication date: December 25, 2014Inventor: Xiaojie Xue
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Patent number: 8853839Abstract: A housing for integrated devices that includes an air-release mechanism is disclosed. This is achieved, in various embodiments, by forming a vent hole in a package substrate, and arranging a package lid over the package substrate. The vent hole allows air to be released from within the cavity package, thereby ensuring that the package lid remains stably affixed to the package substrate despite increased temperatures during processing. The vent hole may be sealed upon mounting the package onto a mounting substrate.Type: GrantFiled: October 4, 2012Date of Patent: October 7, 2014Assignee: Analog Devices, Inc.Inventors: Jia Gao, Jicheng Yang, Shafi Saiyed, Siu Lung Ng, Xiaojie Xue
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Patent number: 8836132Abstract: Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads.Type: GrantFiled: April 3, 2012Date of Patent: September 16, 2014Assignee: Analog Devices, Inc.Inventor: Xiaojie Xue
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Publication number: 20140217566Abstract: Various embodiments of an integrated device package are disclosed herein. The package may include a leadframe having a first side and a second side opposite the first side. The leadframe can include a plurality of leads surrounding a die mounting region. A first package lid may be mounted on the first side of the leadframe to form a first cavity, and a first integrated device die may be mounted on the first side of the leadframe within the first cavity. A second integrated device die can be mounted on the second side of the leadframe. At least one lead of the plurality of leads can provide electrical communication between the first integrated device die and the second integrated device die.Type: ApplicationFiled: February 1, 2013Publication date: August 7, 2014Applicant: ANALOG DEVICES, INC.Inventors: Thomas M. Goida, Xiaojie Xue
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Patent number: 8692366Abstract: A MEMS package includes a substrate having an L-shaped cross-section. The substrate includes a vertical portion having a front surface and a back surface, and a horizontal portion protruding from a lower part of the front surface of the vertical portion, wherein the front surface of the vertical portion includes a mounting region. A MEMS die is mounted on the mounting region such that the MEMS die is oriented substantially parallel to the front surface; a lid attached to the front surface of the substrate while covering the MEMS die; and a plurality of leads formed on a bottom surface of the substrate. The leads can extend substantially parallel to one another, and substantially perpendicular to the front surface. The MEMS die can be oriented substantially perpendicular to a PCB substrate on which the package is mounted.Type: GrantFiled: April 12, 2011Date of Patent: April 8, 2014Assignee: Analog Device, Inc.Inventors: Xiaojie Xue, Carl Raleigh
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Patent number: 8624380Abstract: A vertical mount pre-molded type package for use with a MEMS sensor may be formed with a low moisture permeable molding material that surrounds a portion of the leadframes and forms a cavity in which one or multiple dies may be held. The package includes structures to reduce package vibration, reduce die stress, increase vertical mount stability, and improve solder joint reliability. The vertical mount package includes a first leadframe having first leads and molding material substantially surrounding at least a portion of the first leads. The molding material forms a cavity for holding the MEMS sensor and forms a package mounting plane for mounting the package on a base. The cavity has a die mounting plane that is substantially non-parallel to the package mounting plane. The first leads are configured to provide electrical contacts within the cavity and to provide electrical contacts to the base.Type: GrantFiled: May 7, 2012Date of Patent: January 7, 2014Assignee: Analog Devices, Inc.Inventors: Xiaojie Xue, Carl Raleigh, Thomas M. Goida