Abstract: A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.

Abstract: Examples herein include thermally conductive pathways for glass substrates such as used by passive on glass devices that may be used to enhance the thermal conductivity of an integrated POG device. By using a thermally conductive material for passivation of the device pathways during manufacturing, the device pathways may be able to conduct heat away from the device. For example, by using a selected poly (p-phenylene benzobisoxazole) (PBO) based material (e.g., poly-p-phenylene-2, 6-benzobisoxazole) instead of conventional polyimide (PI) materials during a Cu pattern passivation process, the overall thermal performance of the device, may be enhanced.

Abstract: Examples herein include thermally conductive pathways for glass substrates such as used by passive on glass devices that may be used to enhance the thermal conductivity of an integrated POG device. By using a thermally conductive material for passivation of the device pathways during manufacturing, the device pathways may be able to conduct heat away from the device. For example, by using a selected poly (p-phenylene benzobisoxazole) (PBO) based material (e.g., poly-p-phenylene-2, 6-benzobisoxazole) instead of conventional polyimide (PI) materials during a Cu pattern passivation process, the overall thermal performance of the device, may be enhanced.

Abstract: A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.

Abstract: Disclosed are devices and methods for on-die electrostatic discharge (ESD) protection in an electronic device. Aspects disclosed include an electronic device including a protected circuit disposed within a die having a first port and a second port. A first inductor is also disposed within the die and is electrically coupled to the first port. A second inductor is also disposed within the die and electrically coupled to the second port. The first inductor and the second inductor are routed in close proximity and are configured so the first inductor is out of phase with the second inductor.

Abstract: A three-dimensional (3D) solenoid structure includes a first inductor portion having a first surface and a second surface opposite the first surface. The 3D solenoid structure further includes a first capacitor portion, a first inductor pillar, at least one capacitor pillar, a second inductor portion, a second inductor pillar and a first inductor bonding interface. The first inductor pillar is coupled to the first surface of the first inductor portion. The capacitor pillar(s) is coupled to the first capacitor portion. The second inductor portion includes a first surface and a second surface opposite the first surface. The second inductor pillar is coupled to the first surface of the second inductor portion. The first inductor bonding interface, between the first inductor pillar and the second inductor pillar, couples together the first inductor portion and the second inductor portion.

Abstract: Aspects of the present disclosure provide three-dimensional (3D) through-glass-via (TGV) inductors for use in electronic devices. In some embodiments, a first portion of a 3D TGV inductor may be formed in a first wafer and a second portion of a 3D TGV may be formed in a second wafer. The first portion and second portion may be bonded together in a bonded wafer device thereby forming a larger inductor occupying relatively little wafer space on the first and the second wafers.

Abstract: A filter including an insulating die having a plurality of MIM (Metal Insulator Metal) capacitors disposed within the die is disclosed. A 2.5D (2.5 Dimensional) inductor disposed within a redistribution layer (RDL) is electrically coupled to at least one of the plurality of MIM capacitors in the die. A 3D (3 Dimensional) inductor is disposed around the die and is electrically coupled to at least one of the plurality of MIM capacitors.

Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.

Abstract: Aspects of the present disclosure provide three-dimensional (3D) through-glass-via (TGV) inductors for use in electronic devices. In some embodiments, a first portion of a 3D TGV inductor may be formed in a first wafer and a second portion of a 3D TGV may be formed in a second wafer. The first portion and second portion may be bonded together in a bonded wafer device thereby forming a larger inductor occupying relatively little wafer space on the first and the second wafers.

Abstract: Apparatus implementing various structures to decrease the distance between two inductive elements for tuning an inductance with greater variability (a wider tuning range). One example integrated circuit (IC) package generally includes a laminate, a solder resist layer disposed on an upper surface of the laminate, and a semiconductor die disposed above the laminate and comprising a first inductor. At least a portion of a second inductor is disposed above a section of the solder resist layer, the first inductor at least partially overlaps the second inductor, and there is a gap between the first inductor and the second inductor.

Abstract: A three-dimensional (3D) solenoid structure includes a first inductor portion having a first surface and a second surface opposite the first surface. The 3D solenoid structure further includes a first capacitor portion, a first inductor pillar, at least one capacitor pillar, a second inductor portion, a second inductor pillar and a first inductor bonding interface. The first inductor pillar is coupled to the first surface of the first inductor portion. The capacitor pillar(s) is coupled to the first capacitor portion. The second inductor portion includes a first surface and a second surface opposite the first surface. The second inductor pillar is coupled to the first surface of the second inductor portion. The first inductor bonding interface, between the first inductor pillar and the second inductor pillar, couples together the first inductor portion and the second inductor portion.

Abstract: An inductor-capacitor (LC) filter includes an inductor having an asymmetric shape including at least one turn. The LC filter also includes serial capacitors coupled to the inductor at only one end of a continuous portion of the inductor. The serial capacitors continues the shape of the inductor. The capacitors are outside of a footprint of the continuous portion of the inductor.

Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.

Abstract: To overcome the deficiencies of conventional rectangular circuit wafers, a glass substrate circuit wafer with an obtuse angle on the perimeter may be used. In one example, a glass substrate wafer may include a first circuit on a first portion of a glass substrate and a second circuit on a second portion of the glass substrate where the first portion has a first obtuse angle and the second portion has a second obtuse angle that is complementary to the first obtuse angle on the perimeter of the first portion to mate together to form an outer perimeter that comprises right angles.

Abstract: A bread maker has a base disposed with a power member, a container, an upper rotating shaft and a lower rotating shaft. The power member is in driving connection with the lower rotating shaft. The lower rotating shaft is in driving connection with the upper rotating shaft. The upper rotating shaft is in driving connection with a mixing and kneading blade situated inside the container. A transmitting plate is disposed in the base with an optical signal transmitting lamp and an optical signal receiver. A through hole perpendicular to an axis disposed on the lower shaft and running through the lower rotating shaft is disposed on the lower rotating shaft. The receiver is in signal connection with the power member. The transmitting lamp and the receiver are respectively located at two sides of the lower rotating shaft. The receiver is in signal connection with the power member.

Abstract: A bread maker has a base disposed with a power member, a container, an upper rotating shaft and a lower rotating shaft. The power member is in driving connection with the lower rotating shaft. The lower rotating shaft is in driving connection with the upper rotating shaft. The upper rotating shaft is in driving connection with a mixing and kneading blade situated inside the container. A transmitting plate is disposed in the base with an optical signal transmitting lamp and an optical signal receiver. A through hole perpendicular to an axis disposed on the lower shaft and running through the lower rotating shaft is disposed on the lower rotating shaft. The receiver is in signal connection with the power member. The transmitting lamp and the receiver are respectively located at two sides of the lower rotating shaft. The receiver is in signal connection with the power member.