Patents by Inventor Xiaojuan GAO

Xiaojuan GAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12204131
    Abstract: Backlight module and display device are disclosed. The backlight module includes a light source structure and a light guide plate, which includes a body structure and a wedge-shaped structure disposed on the body structure and located at a side adjacent to the light source structure. The body structure includes a light incident surface of body structure. The wedge-shaped structure includes a bottom surface, a wedge surface and a light incident surface of wedge-shaped structure. The light source structure includes a light source, light emitted by which enters the light guide plate through the light incident surface of body structure and the light incident surface of wedge-shaped structure. In a direction perpendicular to the bottom surface, a ratio of thickness of the body structure to thickness of light-exiting surface of the light source is less than or equal to 88%.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: January 21, 2025
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaodong Wang, Luo Zhang, Yangli Zheng, Xiaoping Zhang, Jian Ren, Fangyi Liu, Xiaojuan Gao, Zhenguo Zhou, Siqi Yin
  • Publication number: 20250015093
    Abstract: The present disclosure provides a connection structure, a display panel, a manufacturing method, a detection circuitry and a display device. The connection structure includes a connection unit. The connection unit includes a first connection member, a second connection member, and a binding member. The first connection member includes a plurality of first connectors, the second connection member includes a plurality of second connectors, the binding member includes a plurality of binding pins, the connection unit includes a plurality of metal layers and a plurality of insulation layers, the second connector includes a second connection line, the second connection line includes at least two second connection line portions electrically coupled to each other, and at least two insulation layers in the connection unit are arranged on a side of the at least two metal layers away from the base substrate.
    Type: Application
    Filed: September 1, 2022
    Publication date: January 9, 2025
    Inventors: Xiaojuan GAO, Boning WANG, Litao FAN, Yangli ZHENG, Jian REN, Xiaoping ZHANG, Gaowei CHEN, Fangyi LIU, Shuqian DOU, Yaodong WANG, Jian ZHANG, Zhenguo ZHOU, Naiqi MEN, Luo ZHANG, Yingxue YU, Siqi YIN
  • Patent number: 12057051
    Abstract: The disclosure provides an array substrate, a display panel and a displaying device, relating to the technical field of display ambient light. The array substrate has an active area and a peripheral area located on at least one side of the active area. The array substrate comprises a brightness detection module and a reference module. The brightness detection module is arranged in the peripheral area, comprising at least one first thin-film transistor. The brightness detection module is configured to receive ambient light, generate an ambient light brightness detecting current signal in response to the ambient light and output the ambient light brightness detecting current signal. The reference module is arranged in the peripheral area, comprising at least one second thin-film transistor. The reference module is configured to, in a dark state without ambient light, generate and output a reference current signal.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: August 6, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiaojuan Gao, Shuqian Dou, Siqi Yin, Litao Fan, Xiaoping Zhang, Yangli Zheng, Jian Ren, Site Cai
  • Patent number: 12057481
    Abstract: A method for forming a semiconductor memory device is disclosed. A substrate is provided. A source diffusion region is formed in the substrate. Two floating gates are on opposite sides of the source diffusion region. A first dielectric cap layer is formed directly on each of the floating gates. An erase gate is formed on the source diffusion region. The erase gate partially overlaps an upper inner corner of each of the floating gates. A second dielectric cap layer is formed on the erase gate and the first dielectric cap layer. A select gate is formed on a sidewall of the first dielectric cap layer in a self-aligned manner. A drain diffusion region is formed in the substrate and adjacent to the select gate.
    Type: Grant
    Filed: May 21, 2023
    Date of Patent: August 6, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, Zhiguo Li, Xiaojuan Gao, Chi Ren
  • Publication number: 20240248247
    Abstract: Backlight module and display device are disclosed. The backlight module includes a light source structure and a light guide plate, which includes a body structure and a wedge-shaped structure disposed on the body structure and located at a side adjacent to the light source structure. The body structure includes a light incident surface of body structure. The wedge-shaped structure includes a bottom surface, a wedge surface and a light incident surface of wedge-shaped structure. The light source structure includes a light source, light emitted by which enters the light guide plate through the light incident surface of body structure and the light incident surface of wedge-shaped structure. In a direction perpendicular to the bottom surface, a ratio of thickness of the body structure to thickness of light-exiting surface of the light source is less than or equal to 88%.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 25, 2024
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaodong WANG, Luo ZHANG, Yangli ZHENG, Xiaoping ZHANG, Jian REN, Fangyi LIU, Xiaojuan GAO, Zhenguo ZHOU, Siqi YIN
  • Publication number: 20240242695
    Abstract: Provided are a brightness control method and apparatus for a display panel. The brightness control method includes: loading a measurement pulse-signal to a source of a first thin film transistor of a brightness measurement module in a display panel and a source of a second thin film transistor of a reference module, loading an adjustment control-signal to a gate of the first and second thin film transistors, the adjustment control-signal is a fixed voltage signal, the range of a voltage difference between the adjustment control-signal and a drain of the second thin film transistor is ?2V-2V, the voltage range of an active level of the measurement pulse-signal is 3V-14V; detecting a brightness measurement signal output by the brightness measurement module, detecting a reference signal output by the reference module; adjusting the brightness of the display panel by means of detected brightness measurement signal and reference signal.
    Type: Application
    Filed: March 29, 2024
    Publication date: July 18, 2024
    Inventors: Shuqian DOU, Hao WU, Xiaofeng YIN, Jian REN, Xiaoping ZHANG, Litao FAN, Shengwei YANG, Xiaojuan GAO
  • Patent number: 11943920
    Abstract: A semiconductor memory device includes a semiconductor substrate, a select gate on the semiconductor substrate, a control gate disposed adjacent to the select gate and having a first sidewall and a second sidewall, and a charge storage layer between the control gate and the semiconductor substrate. The control gate includes a third sidewall close to the second sidewall of the select gate, a fourth sidewall opposite to the third sidewall, and a non-planar top surface between the third sidewall and the fourth sidewall. The non-planar top surface includes a first surface region that descends from the third sidewall to the fourth sidewall. The charge storage layer extends to the second sidewall of the select gate.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, Zhiguo Li, Chi Ren, Xiaojuan Gao, Boon Keat Toh
  • Publication number: 20230358634
    Abstract: The disclosure relates to a method for measuring parameters of roadway low-position lighting fixtures, comprising: selecting a plurality of sets of low-position lighting fixtures with preset color temperatures and color rendering indexes, or a set of low-position lighting fixtures configurable with multiple pairs of preset color temperature and color rendering index; for each set of the plurality of sets of low-position lighting fixtures or each pair of preset color temperature and color rendering index in the set of low-position lighting fixtures, dynamically recognizing a target under different predetermined luminance levels at different predetermined operating speeds; using obtained samples to fit a relationship model between recognition distance and luminance; and based on the fitted relationship model, determining at least one set of said plurality of sets of low-position lighting fixtures or determining at least one pair of preset color temperature and color rendering index for said set of low-position
    Type: Application
    Filed: September 16, 2021
    Publication date: November 9, 2023
    Applicant: BEIJING UNIVERSITY OF TECHNOLOGY
    Inventors: Jiangbi HU, Yunpeng GUO, Xiaojuan GAO, Ronghua WANG
  • Publication number: 20230299160
    Abstract: A method for forming a semiconductor memory device is disclosed. A substrate is provided. A source diffusion region is formed in the substrate. Two floating gates are on opposite sides of the source diffusion region. A first dielectric cap layer is formed directly on each of the floating gates. An erase gate is formed on the source diffusion region. The erase gate partially overlaps an upper inner corner of each of the floating gates. A second dielectric cap layer is formed on the erase gate and the first dielectric cap layer. A select gate is formed on a sidewall of the first dielectric cap layer in a self-aligned manner. A drain diffusion region is formed in the substrate and adjacent to the select gate.
    Type: Application
    Filed: May 21, 2023
    Publication date: September 21, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, ZHIGUO LI, Xiaojuan Gao, CHI REN
  • Patent number: 11699730
    Abstract: A semiconductor memory device includes a substrate; a source diffusion region in the substrate; a pair of floating gates disposed on opposite of the source diffusion region; a first dielectric cap layer disposed directly on each of the floating gates; an erase gate disposed on the source diffusion region and partially overlapping an upper inner corner of each of the floating gates; a second dielectric cap layer disposed on the erase gate and the first dielectric cap layer; a select gate disposed on a sidewall of the first dielectric cap layer; and a drain diffusion region disposed in the substrate and adjacent to the select gate.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: July 11, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, Zhiguo Li, Xiaojuan Gao, Chi Ren
  • Patent number: 11690220
    Abstract: A flash includes a substrate. Two gate structures are disposed on the substrate. Each of the gate structures includes a floating gate and a control gate. The control gate is disposed on the floating gate. An erase gate is disposed between the gate structures. Two word lines are respectively disposed at a side of each of the gate structures. A top surface of each of the word lines includes a first concave surface and a sharp angle. The sharp angle is closed to a sidewall of the word line which the sharp angle resided. The sidewall is away from each of the gate structures. The sharp angle connects to the first concave surface.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: June 27, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Xiaojuan Gao, Chi Ren
  • Patent number: 11587489
    Abstract: A method for driving display panel includes: for one of adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by a data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; first and second orders each represents an order of inputting data signals to the data lines; first order is opposite to second order; for the other of the adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by the data selector.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: February 21, 2023
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhenguo Zhou, Xuewen Cao, Site Cai, Jian Ren, Xiaoping Zhang, Litao Fan, Xiaojuan Gao, Jian Zhang, Shuqian Dou, Yingxue Yu, Yujie Liu, Dongxu Yang, Yaodong Wang, Luo Zhang, Siqi Yin, Xianfeng Mao, Mengxing Xu
  • Publication number: 20230045722
    Abstract: A semiconductor memory device includes a semiconductor substrate, a select gate on the semiconductor substrate, a control gate disposed adjacent to the select gate and having a first sidewall and a second sidewall, and a charge storage layer between the control gate and the semiconductor substrate. The control gate includes a third sidewall close to the second sidewall of the select gate, a fourth sidewall opposite to the third sidewall, and a non-planar top surface between the third sidewall and the fourth sidewall. The non-planar top surface includes a first surface region that descends from the third sidewall to the fourth sidewall. The charge storage layer extends to the second sidewall of the select gate.
    Type: Application
    Filed: September 7, 2021
    Publication date: February 9, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, Zhiguo Li, Chi Ren, Xiaojuan Gao, Boon Keat Toh
  • Publication number: 20230029468
    Abstract: A semiconductor memory device includes a substrate; a source diffusion region in the substrate; a pair of floating gates disposed on opposite of the source diffusion region; a first dielectric cap layer disposed directly on each of the floating gates; an erase gate disposed on the source diffusion region and partially overlapping an upper inner corner of each of the floating gates; a second dielectric cap layer disposed on the erase gate and the first dielectric cap layer; a select gate disposed on a sidewall of the first dielectric cap layer; and a drain diffusion region disposed in the substrate and adjacent to the select gate.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Liang Yi, ZHIGUO LI, Xiaojuan Gao, CHI REN
  • Patent number: 11567256
    Abstract: The present disclosure provides a backlight module and a display device. The backlight module includes: a back plate including a bottom wall and a side wall coupled thereto, with the bottom wall and the side wall defining an accommodating space; a light guide plate disposed in the accommodating space and including: a light outgoing surface disposed away from the bottom wall, a bottom surface disposed toward the bottom wall, and a light incident surface coupled between the light outgoing face and the bottom face; a light source disposed in the accommodating space and configured to emit light toward the light incident surface; and a composite film located on a side of the light guide plate away from the bottom wall and including a diffuser sheet and a plurality of prism sheets combined together and sequentially arranged in a direction away from the light guide plate.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 31, 2023
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaodong Wang, Yangli Zheng, Xiaoping Zhang, Jian Ren, Site Cai, Luo Zhang, Qin Xin, Zhenguo Zhou, Siqi Yin, Fangyi Liu, Boning Wang, Litao Fan, Xiaojuan Gao
  • Publication number: 20220352190
    Abstract: A flash includes a substrate. Two gate structures are disposed on the substrate. Each of the gate structures includes a floating gate and a control gate. The control gate is disposed on the floating gate. An erase gate is disposed between the gate structures. Two word lines are respectively disposed at a side of each of the gate structures. A top surface of each of the word lines includes a first concave surface and a sharp angle. The sharp angle is closed to a sidewall of the word line which the sharp angle resided. The sidewall is away from each of the gate structures. The sharp angle connects to the first concave surface.
    Type: Application
    Filed: July 12, 2022
    Publication date: November 3, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Xiaojuan Gao, CHI REN
  • Patent number: 11424258
    Abstract: A flash includes a substrate. Two gate structures are disposed on the substrate. Each of the gate structures includes a floating gate and a control gate. The control gate is disposed on the floating gate. An erase gate is disposed between the gate structures. Two word lines are respectively disposed at a side of each of the gate structures. A top surface of each of the word lines includes a first concave surface and a sharp angle. The sharp angle is closed to a sidewall of the word line which the sharp angle resided. The sidewall is away from each of the gate structures. The shape angle connects to the first concave surface.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: August 23, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Xiaojuan Gao, Chi Ren
  • Publication number: 20220246647
    Abstract: The disclosure provides an array substrate, a display panel and a displaying device, relating to the technical field of display ambient light. The array substrate has an active area and a peripheral area located on at least one side of the active area. The array substrate comprises a brightness detection module and a reference module. The brightness detection module is arranged in the peripheral area, comprising at least one first thin-film transistor. The brightness detection module is configured to receive ambient light, generate an ambient light brightness detecting current signal in response to the ambient light and output the ambient light brightness detecting current signal. The reference module is arranged in the peripheral area, comprising at least one second thin-film transistor. The reference module is configured to, in a dark state without ambient light, generate and output a reference current signal.
    Type: Application
    Filed: September 27, 2021
    Publication date: August 4, 2022
    Inventors: Xiaojuan GAO, Shuqian DOU, Siqi YIN, Litao FAN, Xiaoping ZHANG, Yangli ZHENG, Jian REN, Site CAI
  • Publication number: 20220238542
    Abstract: A flash includes a substrate. Two gate structures are disposed on the substrate. Each of the gate structures includes a floating gate and a control gate. The control gate is disposed on the floating gate. An erase gate is disposed between the gate structures. Two word lines are respectively disposed at a side of each of the gate structures. A top surface of each of the word lines includes a first concave surface and a sharp angle. The sharp angle is closed to a sidewall of the word line which the sharp angle resided. The sidewall is away from each of the gate structures. The shape angle connects to the first concave surface.
    Type: Application
    Filed: February 17, 2021
    Publication date: July 28, 2022
    Inventors: Xiaojuan Gao, CHI REN
  • Publication number: 20220163719
    Abstract: The present disclosure provides a backlight module and a display device. The backlight module includes: a back plate including a bottom wall and a side wall coupled thereto, with the bottom wall and the side wall defining an accommodating space; a light guide plate disposed in the accommodating space and including: a light outgoing surface disposed away from the bottom wall, a bottom surface disposed toward the bottom wall, and a light incident surface coupled between the light outgoing face and the bottom face; a light source disposed in the accommodating space and configured to emit light toward the light incident surface; and a composite film located on a side of the light guide plate away from the bottom wall and including a diffuser sheet and a plurality of prism sheets combined together and sequentially arranged in a direction away from the light guide plate.
    Type: Application
    Filed: September 20, 2021
    Publication date: May 26, 2022
    Inventors: Yaodong WANG, Yangli ZHENG, Xiaoping ZHANG, Jian REN, Site CAI, Luo ZHANG, Qin XIN, Zhenguo ZHOU, Siqi YIN, Fangyi LIU, Boning WANG, Litao FAN, Xiaojuan GAO