Abstract: Provided are a heterocyclic amide compound of general formula (I), a pharmaceutically acceptable salt thereof and a preparation method therefor, and the use of the compound in the preparation of a drug for treating diseases related to the activity of STING, in the preparation of an immunologic adjuvant, and in the preparation of a drug for activating STING.

Abstract: A multi-level cross-district surface well pattern deployment method is provided. Firstly, a first horizontal well is drilled from a location on a land surface corresponding to a junction H1 of a district rise coal pillar of the first district C1 in a first level and an upper mine field boundary coal pillar. A multilateral well is drilled from a location on the land surface corresponding to a junction H3 of a level coal pillar between the first and second levels, and the district rise coal pillar of the first district C1 in the first level. Liquid nitrogen is injected for permeability improvement after a gas drainage quantity decreases to 20% of an initial quantity. Gas drainage is repeated multiple times until the drainage quantity of coal bed methane through a gas drainage pipe of the horizontal pipe is reached 3 m3/min.

Abstract: The present application relates to a method and an apparatus for controlling a temperature of a battery pack, a battery management system, and a storage medium. The method for controlling a temperature of a battery pack includes: detecting a SOC of the battery pack; determining a SOC interval in which the SOC is located from a plurality of preset SOC intervals; determining a target temperature threshold corresponding to the SOC interval under a condition that a preset battery pack life requirement is met, based on a mapping relationship between preset SOC intervals, target temperature thresholds and battery pack life; and performing thermal management on the battery pack based on the target temperature threshold; where the performing thermal management on the battery pack based on the target temperature threshold comprises cooling the battery pack based on the target temperature threshold.

Abstract: The present application relates to a method and an apparatus for controlling a temperature of a battery pack, a battery management system, and a storage medium. The method for controlling a temperature of a battery pack includes: detecting a SOC of the battery pack; determining a SOC interval in which the SOC is located from a plurality of preset SOC intervals; determining a target temperature threshold corresponding to the SOC interval under a condition that a preset battery pack life requirement is met, based on a mapping relationship between preset SOC intervals, target temperature thresholds and battery pack life; and performing thermal management on the battery pack based on the target temperature threshold; where the performing thermal management on the battery pack based on the target temperature threshold comprises cooling the battery pack based on the target temperature threshold.

Abstract: Disclosed is an environment forming apparatus suitable for biological cultivation in extraterrestrial space. The apparatus includes a shell and a biological cabin configured in an upper space of the shell. A light management system for importing light of biological growth from external world is configured in the upper space, a thermal management system for at least balancing a temperature of the upper space and a water supplying system and configured for providing water for creatures growth are both configured on the shell. The biological cabin and the like are set at the appropriate part of the shell, an environment which is relatively suitable for biological growth or cultivation can be created and simulated on an extraterrestrial star, a condition is provided for ecological cultivation of the extraterrestrial space, an ecosystem of the extraterrestrial space can be formed, smooth extraterrestrial space biological experiment process is guaranteed.

Abstract: Embodiments of the present invention provide a method and a device for detecting SOC of a battery. The method for detecting SOC of a battery includes: determining an initial SOC value of the battery according to a waiting time of the battery; calculating a current SOC value of the battery based on the initial SOC value and a current working current of the battery, denoting as a first SOC value. In embodiments of the present invention, the current of the battery is real-time measured and the SOC value of the battery is calculated by accumulating the current of the battery, in addition, the initial SOC value is calibrated by the waiting time, so that the error of the SOC detection result is reduced, thereby increasing accuracy of the SOC detection result.

Abstract: A semiconductor device includes a semiconductor substrate, a first SiGe semiconductor fin on the semiconductor substrate, and a dielectric layer on the semiconductor substrate and side surfaces of the first SiGe semiconductor fin. The first SiGe semiconductor fin has a Ge content that gradually changes from bottom to top. The dielectric layer has an upper surface lower than an upper surface of the first SiGe semiconductor fin.

Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate, a dielectric layer on the semiconductor substrate, and a hardmask on a second portion of the dielectric layer while exposing a first portion of the dielectric layer; forming a copolymer on the semiconductor structure; performing an annealing treatment such that the copolymer forms a staggered configuration of a first monomer and a second monomer; removing the first monomer; performing a first etching process on the first portion using the second monomer as a mask to form a first trench extending to the semiconductor substrate; removing the second monomer and the first hardmask; and epitaxially growing a first semiconductor fin in the first trench.

Abstract: The present invention provides a storage controller and a using method therefor. The method comprises: processors send a storage instruction; a processor controller receives the storage instructions sent by the processors, and sends the storage instructions to an exchanger; the exchanger sends the storage instructions to a hard disk controller one by one; and the hard disk controller sends the storage instructions to a hard disk according to storage address spaces indicated in the storage instructions, the indicated address spaces being address spaces allocated to the processors sending the storage instructions. By using the technical scheme of the present invention, multiplexing of the same physical storage space for the storage instructions of multiple processors can be ensured in a time-sharing mechanism, and accordingly, a purpose that the multiple processors share the same physical storage space by means of hardware is achieved.

Abstract: A comparator includes a current mirror module, a comparison module and a buffering and outputting module. The current mirror module provides a bias current to the comparison module. The comparison module comprises a positive input end, a first negative input end and a second negative input end, the positive input end connects to an external terminal, the first negative input end and the second negative input end input a low threshold voltage and a high threshold voltage, respectively. The comparison module compares a voltage of the positive input end to the low threshold voltage and the high threshold voltage, and outputs a comparison result to the buffering and outputting module.

Abstract: Disclosed are aminosulfonyl-based compounds represented by the general formula I or tautomers, enantiomers, racemates or pharmaceutically acceptable salts thereof, a method for preparing the same, pharmaceutical compositions and uses thereof. The compounds can be used to treat epilepsy, convulsions, obesity and the like.

Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate, a dielectric layer on the semiconductor substrate, and a hardmask on a second portion of the dielectric layer while exposing a first portion of the dielectric layer; forming a copolymer on the semiconductor structure; performing an annealing treatment such that the copolymer forms a staggered configuration of a first monomer and a second monomer; removing the first monomer; performing a first etching process on the first portion using the second monomer as a mask to form a first trench extending to the semiconductor substrate; removing the second monomer and the first hardmask; and epitaxially growing a first semiconductor fin in the first trench.

Abstract: The present invention discloses a comparator and low power consumption oscillator thereof.

Abstract: Embodiments of the present invention provide a method and a device for detecting SOC of a battery. The method for detecting SOC of a battery includes: determining an initial SOC value of the battery according to a waiting time of the battery; calculating a current SOC value of the battery based on the initial SOC value and a current working current of the battery, denoting as a first SOC value. In embodiments of the present invention, the current of the battery is real-time measured and the SOC value of the battery is calculated by accumulating the current of the battery, in addition, the initial SOC value is calibrated by the waiting time, so that the error of the SOC detection result is reduced, thereby increasing accuracy of the SOC detection result.

Abstract: Provided is a cloud server system, the system comprising a plurality of multi-root input/output virtualized PCIE switches (MR-IOV Switches) that are interconnected each other. The cloud server system based on the MR-IOV PCIE Switch in the present invention can well meet the design requirements of the cloud servers very well, with a high performance-to-consumption ratio, strong overall service capability, low cost, low power consumption and high energy efficiency. I/O virtualization is realized architecture, thus maximally ensuring the performance of the server.

Abstract: The present invention discloses a method and a device to debug the Loongson CPU (a MIPS-structure CPU) and bridge chips. The device, including HT bus interfaces and the corresponding switches, connects the Loongson CPU and bridge chips through HT bus interfaces. Southbridge chips and northbridge chips with HT buses are selected in the following order: introducing the pins on the Loongson CPU and bridge chips into the debug device; debugging the pins on the Loongson CPU to identify whether there are any bugs with the pins; connecting the pins from the CPU and bridge chips to debug them. If the HT bus of the Loongson CPU fails to accord with the standard protocol, the problematic signal can be identified and further adjusted to improve the CPU. With the help of FPGA, multiple HT bus interfaces can be simulated. As a result, multiple chipsets can be linked to the Loongson CPU, which may be debugged simultaneously.

Abstract: Disclosed are aminosulfonyl-based compounds represented by the general formula I or tautomers, enantiomers, racemates or pharmaceutically acceptable salts thereof, a method for preparing the same, pharmaceutical compositions and uses thereof. The compounds can be used to treat epilepsy, convulsions, obesity and the like.

Abstract: The present invention provides a storage controller and a using method therefor. The method comprises: processors send a storage instruction; a processor controller receives the storage instructions sent by the processors, and sends the storage instructions to an exchanger; the exchanger sends the storage instructions to a hard disk controller one by one; and the hard disk controller sends the storage instructions to a hard disk according to storage address spaces indicated in the storage instructions, the indicated address spaces being address spaces allocated to the processors sending the storage instructions. By using the technical scheme of the present invention, multiplexing of the same physical storage space for the storage instructions of multiple processors can be ensured in a time-sharing mechanism, and accordingly, a purpose that the multiple processors share the same physical storage space by means of hardware is achieved.