Patents by Inventor Xiaoli He

Xiaoli He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260165109
    Abstract: Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a first die, and a second die bonded above the first die. The second die may include a front-end-of-line (FEOL) on a bottom side of the second die facing the first die and a backside power delivery network (BSPDN) on a top side of the second die. The semiconductor structure may also include a permanent carrier hybrid bonded above the second die with a power grid directly supplying a power signal to the BSPDN.
    Type: Application
    Filed: December 5, 2024
    Publication date: June 11, 2026
    Inventors: Xiaoli He, Joshua Mark Rubin, Tao Li, Ruilong Xie
  • Publication number: 20260129967
    Abstract: A semiconductor device including nanosheets transistors that have low capacitance and different threshold voltages is provided. The different threshold voltage are obtained using different shaped semiconductor channel material nanosheets and, in some embodiments, by providing different dopant concentrations to the high-k gate dielectric layers of the nanosheet transistors.
    Type: Application
    Filed: November 7, 2024
    Publication date: May 7, 2026
    Inventors: Xiaoli He, Ruilong Xie, Takashi Ando, Kishwar Mashooq, Julien Frougier
  • Publication number: 20260113980
    Abstract: Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a first and a second transistor; a power rail via between the first and the second transistor; a backside via below the power rail via, the backside via having a first portion directly contacting the power rail via and a second portion underneath the first portion; and an isolation spacer surrounding the second portion of the backside via. The backside via further includes a third portion underneath the second portion. A backside capping layer underneath the isolation spacer surrounds the third portion of the backside via. A method of forming the same is also provided.
    Type: Application
    Filed: October 21, 2024
    Publication date: April 23, 2026
    Inventors: Xiaoli He, Ruilong Xie, Tao Li, HUIMEI ZHOU, Xiaoming Yang, Nicolas Jean Loubet
  • Publication number: 20260104779
    Abstract: Methods and systems for automatically enhancing UI elements of a content platform in response to an audio-visual cue are provided herein. A user interface (UI) of a content platform to play a media item is provided for presentation on a user device of a user. An occurrence of an audio-visual cue, within the media item, for the user to engage with the UI of the content platform is detected during playback of the media item via the UI of the content platform. A UI element corresponding to the audio-visual cue for the user to engage with the UI of the content platform is identified among the plurality of UI elements of the UI. Causing the corresponding UI element to be enhanced on the UI of the content platform.
    Type: Application
    Filed: October 16, 2024
    Publication date: April 16, 2026
    Inventors: Thomas F Moran, III, Jackelyn Shen, Priyanka Agarwal, Xiaoli He
  • Publication number: 20250349714
    Abstract: A semiconductor device includes front end of line (FEOL) devices arranged in a FEOL layer defining a frontside and a backside opposite the frontside. A single composition dielectric material covers the FEOL devices and is disposed in shallow trench isolation regions between the FEOL devices. The dielectric material has voids disposed therein that provide airgaps between the FEOL devices.
    Type: Application
    Filed: May 7, 2024
    Publication date: November 13, 2025
    Inventors: Xiaoli He, Tao Li, Ruilong Xie, Nicolas Jean Loubet
  • Patent number: 11462491
    Abstract: An array substrate and a manufacturing method thereof are provided. A plurality of groups of bonding terminals are formed on a substrate, a first electrostatic protection wire is formed on a marginal region of the substrate, and a second electrostatic protection wire is formed to connect the bonding terminals and the first electrostatic protection wire.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: October 4, 2022
    Assignee: KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
    Inventors: Xiaoli He, Shuai Lin, Xiangqian Wang, Zhihua Zhang, Yao Li
  • Patent number: 11375675
    Abstract: The present disclosure discloses a method for tomato soilless cultivation with suspended trough, including four aspects: setting of soilless cultivation substrate trough, preparation of soilless cultivation substrate, efficient and economical grafting and plant management. The efficient and economical grafting includes seedling raising, preparation of new scion, grafting and healing culture. The plant management includes planting, pruning and vine raising, flower and fruit management, and plant type maintenance. the present disclosure utilizes a soilless cultivation substrate trough, which can overcome the shortcomings of poor water retention, difficult control of temperature and water and fertilizer application in substrate bag cultivation and give full play to the characteristics of the cultivation substrate.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: July 5, 2022
    Assignee: FUJIAN ARGICULTURE AND FORESTRY UNIVERSITY
    Inventors: Fenglin Zhong, Jin Wang, Chunyu Shang, Ru Xu, Shubin Wang, Jiaming Li, Lu Chen, Xiaoli He, Danqing Yang
  • Patent number: 11264477
    Abstract: Structures for field-effect transistors and methods of forming a structure for field-effect transistors. A semiconductor layer includes first and second channel regions, a first field-effect transistor has a first gate dielectric layer over the first channel region, and a second field-effect transistor has a second gate dielectric layer over the second channel region. The first and second channel regions are each composed of an undoped section of an intrinsic semiconductor material, the first gate dielectric layer contains a first atomic concentration of a work function metal, and the second gate dielectric layer contains a second atomic concentration of the work function metal that is greater than the first atomic concentration of the work function metal in the first gate dielectric layer.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: March 1, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Xiaoli He, Bingwu Liu, Tao Chu
  • Publication number: 20210335732
    Abstract: An array substrate and a manufacturing method thereof are provided. A plurality of groups of bonding terminals are formed on a substrate, a first electrostatic protection wire is formed on a marginal region of the substrate, and a second electrostatic protection wire is formed to connect the bonding terminals and the first electrostatic protection wire.
    Type: Application
    Filed: May 25, 2018
    Publication date: October 28, 2021
    Applicant: KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
    Inventors: Xiaoli HE, Shuai LIN, Xiangqian WANG, Zhihua ZHANG, Yao LI
  • Publication number: 20210091202
    Abstract: Structures for field-effect transistors and methods of forming a structure for field-effect transistors. A semiconductor layer includes first and second channel regions, a first field-effect transistor has a first gate dielectric layer over the first channel region, and a second field-effect transistor has a second gate dielectric layer over the second channel region. The first and second channel regions are each composed of an undoped section of an intrinsic semiconductor material, the first gate dielectric layer contains a first atomic concentration of a work function metal, and the second gate dielectric layer contains a second atomic concentration of the work function metal that is greater than the first atomic concentration of the work function metal in the first gate dielectric layer.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventors: Xiaoli He, Bingwu Liu, Tao Chu
  • Publication number: 20200214230
    Abstract: The present disclosure discloses a method for tomato soilless cultivation with suspended trough, including four aspects: setting of soilless cultivation substrate trough, preparation of soilless cultivation substrate, efficient and economical grafting and plant management. The efficient and economical grafting includes seedling raising, preparation of new scion, grafting and healing culture. The plant management includes planting, pruning and vine raising, flower and fruit management, and plant type maintenance. the present disclosure utilizes a soilless cultivation substrate trough, which can overcome the shortcomings of poor water retention, difficult control of temperature and water and fertilizer application in substrate bag cultivation and give full play to the characteristics of the cultivation substrate.
    Type: Application
    Filed: December 6, 2019
    Publication date: July 9, 2020
    Inventors: Fenglin ZHONG, Jin WANG, Chunyu SHANG, Ru XU, Shubin WANG, Jiaming LI, Lu CHEN, Xiaoli HE, Danqing YANG
  • Patent number: 10112918
    Abstract: The invention relates to a derivative of 15-oxospiramilacton, particularly to a compound of Formula I or II, or an isomer, a solvate or a pharmaceutically acceptable salt thereof. The invention also relates to a pharmaceutical composition comprising the compound as pharmaceutically active ingredient, a method for preparing the same, and use thereof in manufacture of an anti-tumor agent. The derivative of 15-oxospiramilactone of the invention have an activity against multiple tumor cell lines, and the anti-tumor activity is positively correlated to an activity inhibiting the Wnt signaling pathway.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: October 30, 2018
    Assignees: Kunming Institute of Botany, The Chinese Academy of Sciences, The Key Laboratory of Chemistry for Natural Product of Guizhou Province and Chinese Academy of Science, Shanghai Institutes of Biological Sciences, CAS, Institute of Zoology, Chinese Academy of Sciences
    Inventors: Xiaojiang Hao, Chen Yan, Haiyang Liu, Lin Li, Xiaoli He, Quan Chen
  • Patent number: 9666709
    Abstract: A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain in each drain well. The structure further includes an isolation region in each drain well adjacent the drain, each isolation region reaching to a top surface of the corresponding raised structure, and a conductive center gate on each raised structure, the conductive center gate covering a top surface, a front surface and a back surface thereof, and covering a portion of the isolation region opposite the drain. The isolation regions in the drain wells reaching to the raised structure top surface is a result of preserving the isolation region by covering it during fabrication with an HDP oxide to prevent partial removal.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 30, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Xiaoli He, Yanxiang Liu, Jerome Ciavatti, Myung Hee Nam
  • Publication number: 20160225895
    Abstract: A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain in each drain well. The structure further includes an isolation region in each drain well adjacent the drain, each isolation region reaching to a top surface of the corresponding raised structure, and a conductive center gate on each raised structure, the conductive center gate covering a top surface, a front surface and a back surface thereof, and covering a portion of the isolation region opposite the drain. The isolation regions in the drain wells reaching to the raised structure top surface is a result of preserving the isolation region by covering it during fabrication with an HDP oxide to prevent partial removal.
    Type: Application
    Filed: January 29, 2015
    Publication date: August 4, 2016
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Xiaoli HE, Yanxiang LIU, Jerome CIAVATTI, Myung Hee NAM
  • Publication number: 20160185743
    Abstract: The invention relates to a derivative of 15-oxospiramilacton, particularly to a compound of Formula I or II, or an isomer, a solvate or a pharmaceutically acceptable salt thereof. The invention also relates to a pharmaceutical composition comprising the compound as pharmaceutically active ingredient, a method for preparing the same, and use thereof in manufacture of an anti-tumor agent. The derivative of 15-oxospiramilactone of the invention have an activity against multiple tumor cell lines, and the anti-tumor activity is positively correlated to an activity inhibiting the Wnt signaling pathway.
    Type: Application
    Filed: April 21, 2014
    Publication date: June 30, 2016
    Inventors: Xiaojiang Hao, Chen Yan, Haiyang Liu, Lin Li, Xiaoli He, Quan Chen
  • Patent number: D982164
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: March 28, 2023
    Inventor: XiaoLi He