Abstract: Embodiments of the invention provide a sense amplifier, a SRAM chip comprising the sense amplifier and a method of performing read operation on the SRAM chip. The sense amplifier according to embodiments of the invention comprises an additional driving assist portion, which further takes a global data bus as input, the driving assist portion is configured to enable the sense amplifier to provide assisted driving for other sense amplifiers. With the solution according to embodiments of the invention, driving capability of a sense amplifier on global data bus can be enhanced.

Abstract: Embodiments of the invention provide a sense amplifier, a SRAM chip comprising the sense amplifier and a method for conducting read operation on a SRAM cell. The sense amplifier according to an embodiment of the invention comprises a cross coupling circuit, a tail current transistor and an output stage, wherein source of the tail current transistor is connected to a negative level. With the scheme according to embodiments of the invention, speed of the sense amplifier can be enhanced, thereby increasing read speed of the SRAM chip.

Abstract: Embodiments of the invention provide a sense amplifier, a SRAM chip comprising the sense amplifier and a method of performing read operation on the SRAM chip. The sense amplifier according to embodiments of the invention comprises an additional driving assist portion, which further takes a global data bus as input, the driving assist portion is configured to enable the sense amplifier to provide assisted driving for other sense amplifiers. With the solution according to embodiments of the invention, driving capability of a sense amplifier on global data bus can be enhanced.

Abstract: Embodiments of the invention provide a sense amplifier, a SRAM chip comprising the sense amplifier and a method for conducting read operation on a SRAM cell. The sense amplifier according to an embodiment of the invention comprises a cross coupling circuit, a tail current transistor and an output stage, wherein source of the tail current transistor is connected to a negative level. With the scheme according to embodiments of the invention, speed of the sense amplifier can be enhanced, thereby increasing read speed of the SRAM chip.

Abstract: A system for purchasing products through bidding online includes an application server (13), a corporation website (12), a database (15), a plurality of client computers (10) and a plurality of supplier computers (17). The application server includes a supplier data management module (131) for maintaining basic information on suppliers and their products, and predetermining a plurality of selected suppliers according to information on products to be purchased; a price inquiring/quoting/price negotiating management module (132) for inquiring of prices, receiving quotations from selected suppliers, negotiating prices, and generating price-related records; an online bidding management module (133) for opening a bid, comparing bidding results to determine a winning supplier, and generating bid-related records; a contract management module (134) for signing and maintaining of procurement contracts. A method for purchasing products through bidding online is also disclosed.