Patents by Inventor Xiaolin JING

Xiaolin JING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Verification system, verification method, electronic device, and storage medium
    Patent number: 12632628
    Abstract: The present disclosure provides a verification system, a verification method, an electronic device and a storage medium. The verification system includes a simulation verification device, a first portion and a second portion. The first portion includes a first master module and a second slave module. The second slave module includes a memory unit connected to a memory access interface at a periphery of a design under test. The second portion includes a first direct programming interface, a second direct programming interface, a function library module, and a test case module. The first direct programming interface communicates with the first master module and is configured to call a first function to implement front door access to a register of the design under test. The second direct programming interface communicates with the memory unit and is configured to call a second function to implement back door access to the memory unit.
    Type: Grant
    Filed: February 25, 2025
    Date of Patent: May 19, 2026
    Assignees: Beijing Youzhuju Network Technology Co., Ltd., Lemon Inc.
    Inventors: Xiaolin Jing, Di Zhang, Robin Sik, Shan Lu, Jian Wang
  • VERIFICATION SYSTEM, VERIFICATION METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM
    Publication number: 20250200259
    Abstract: The present disclosure provides a verification system, a verification method, an electronic device and a storage medium. The verification system includes a simulation verification device, a first portion and a second portion. The first portion includes a first master module and a second slave module. The second slave module includes a memory unit connected to a memory access interface at a periphery of a design under test. The second portion includes a first direct programming interface, a second direct programming interface, a function library module, and a test case module. The first direct programming interface communicates with the first master module and is configured to call a first function to implement front door access to a register of the design under test. The second direct programming interface communicates with the memory unit and is configured to call a second function to implement back door access to the memory unit.
    Type: Application
    Filed: February 25, 2025
    Publication date: June 19, 2025
    Inventors: Xiaolin JING, Di ZHANG, Robin SIK, Shan LU, Jian WANG