Abstract: A depth image engine and a depth image calculation method are provided. The depth image engine comprises: a buffer, configured to receive a data flow of a first image; an image rotator, configured to perform, after the buffer receives the entire data flow of the first image, a rotation operation on the first image to generate a second image; and a depth value calculator, configured to receive the second image and a reference image to perform a matching calculation on the second image and the reference image to generate a depth image.

Abstract: A depth calculation processor includes: an input port, configured to receive image data from an image sensor; a demultiplexer, connected to the input port, and configured to demultiplex the image data from the input port and output first image data into a first line and second image data into a second line; a grayscale image engine, configured to process the first image data from the first line to generate processed first image data; a depth image engine, configured to receive the second image data from the second line, and calculate depth image data based on the second image data; a multiplexer, configured to output the processed first image data from the grayscale image engine and the depth image data from the depth image engine; and an output port, configured to output the processed first image data and the depth image data from the multiplexer.

Abstract: A depth calculation processor, a data processing method, and a 3D image device are disclosed herein. The depth calculation processor includes: at least two input ports configured to receive a first image data, wherein the first image data comprises at least a structured light image acquired under projection of a structured light; a data processing engine configured to perform a calculation process on the first image data to output a second image data, wherein the second image data comprises at least a depth map, wherein the data processing engine comprises at least a depth processing engine configured to perform a depth calculation process on the structured light image to obtain the depth map; and at least an output port coupled to the data processing engine and configured to output the second image data to a host device.

Abstract: A depth calculation processor includes: an input port, configured to receive image data from an image sensor; a demultiplexer, connected to the input port, and configured to demultiplex the image data from the input port and output first image data into a first line and second image data into a second line; a grayscale image engine, configured to process the first image data from the first line to generate processed first image data; a depth image engine, configured to receive the second image data from the second line, and calculate depth image data based on the second image data; a multiplexer, configured to output the processed first image data from the grayscale image engine and the depth image data from the depth image engine; and an output port, configured to output the processed first image data and the depth image data from the multiplexer.

Abstract: A depth calculation processor comprises: an input port, configured to receive image data from an image sensor; a demultiplexer, connected to the input port, and configured to demultiplex the image data from the input port and output first image data into a first line and second image data into a second line; a grayscale image engine, configured to process the first image data from the first line to generate processed first image data; a depth image engine, configured to receive the second image data from the second line, and calculate depth image data based on the second image data; a multiplexer, configured to output the processed first image data from the grayscale image engine and the depth image data from the depth image engine; and an output port, configured to output the processed first image data and the depth image data from the multiplexer.

Abstract: A depth calculation processor, a data processing method, and a 3D image device are disclosed herein. The depth calculation processor includes: at least two input ports configured to receive a first image data, wherein the first image data comprises at least a structured light image acquired under projection of a structured light; a data processing engine configured to perform a calculation process on the first image data to output a second image data, wherein the second image data comprises at least a depth map, wherein the data processing engine comprises at least a depth processing engine configured to perform a depth calculation process on the structured light image to obtain the depth map; and at least an output port coupled to the data processing engine and configured to output the second image data to a host device.

Abstract: A depth calculation processor, a data processing method, and a 3D image device are disclosed herein. The depth calculation processor includes: two input ports to receive a first image data, wherein the first image data comprises structured light image acquired under projection of structured light; an input switch connected to the input ports and to convey all or some of the first image data from the input ports; a data processing engine connected to the input switch and to process the first image data that is output through the input switch and to output a second image data, wherein the second image data comprises a depth map, wherein the data processing engine comprises a depth processing engine to process the structured light image to obtain the depth map; and one output port connected to the data processing engine and to output the second image data to a main device.

Abstract: A depth image engine and a depth image calculation method are provided. The depth image engine comprises: a buffer, configured to receive a data flow of a first image; an image rotator, configured to perform, after the buffer receives the entire data flow of the first image, a rotation operation on the first image to generate a second image; and a depth value calculator, configured to receive the second image and a reference image to perform a matching calculation on the second image and the reference image to generate a depth image.

Abstract: A depth calculation processor comprises: an input port, configured to receive image data from an image sensor; a demultiplexer, connected to the input port, and configured to demultiplex the image data from the input port and output first image data into a first line and second image data into a second line; a grayscale image engine, configured to process the first image data from the first line to generate processed first image data; a depth image engine, configured to receive the second image data from the second line, and calculate depth image data based on the second image data; a multiplexer, configured to output the processed first image data from the grayscale image engine and the depth image data from the depth image engine; and an output port, configured to output the processed first image data and the depth image data from the multiplexer.

Abstract: A depth calculation processor, a data processing method, and a 3D image device are disclosed herein. The depth calculation processor includes: two input ports to receive a first image data, wherein the first image data comprises structured light image acquired under projection of structured light; an input switch connected to the input ports and to convey all or some of the first image data from the input ports; a data processing engine connected to the input switch and to process the first image data that is output through the input switch and to output a second image data, wherein the second image data comprises a depth map, wherein the data processing engine comprises a depth processing engine to process the structured light image to obtain the depth map; and one output port connected to the data processing engine and to output the second image data to a main device.

Abstract: This invention provides a request controlling apparatus, processor and method. The request controlling apparatus is connected to a request storage unit and includes: a queue unit storing flag recording region configured to record a storing flag corresponding to a queue unit in the request storage unit, a comparing means configured to judge whether a incoming first queue unit corresponds to a same message as an already existing queue unit, where the already existing queue unit is in the request storage unit and a flag setting means is configured to set the storing flag corresponding to the already existing queue unit in the queue unit storing flag recording region, to indicate that a message state related to the already existing queue unit will not be stored if the first queue unit corresponds to the same message as in the already existing queue unit.

Abstract: Reordering the request queue of the hardware accelerator, wherein, the request queue stores therein a plurality of coprocessor request blocks (CRBs) to be input into the hardware accelerator. A content addressable memory is connected to the request queue for storing the state pointer of each CRB in the request queue at a same physical storage location in the request queue, receiving the state pointer of a new CRB in response to the new CRB asking to join in the request queue and outputting the physical storage location of a CRB in the request queue whose state pointer stored in the content addressable memory is the same as the state pointer of the new CRB.

Abstract: This invention provides a request controlling apparatus, processor and method. The request controlling apparatus is connected to a request storage unit and includes: a queue unit storing flag recording region configured to record a storing flag corresponding to a queue unit in the request storage unit, a comparing means configured to judge whether a incoming first queue unit corresponds to a same message as an already existing queue unit, where the already existing queue unit is in the request storage unit and a flag setting means is configured to set the storing flag corresponding to the already existing queue unit in the queue unit storing flag recording region, to indicate that a message state related to the already existing queue unit will not be stored if the first queue unit corresponds to the same message as in the already existing queue unit.

Abstract: The invention discloses a method and system of maintaining states for the request queue of a hardware accelerator, wherein the request queue stores therein at least one Coprocessor Request Block (CRB) to be input into the hardware accelerator, the method comprising: receiving, in response to a CRB specified by the request queue is about to enter the hardware accelerator, the state pointer of the specified CRB; acquiring physical storage locations of other CRBs in the request queue that are stored in the request queue and are the same as the state pointer of the specified CRB; controlling the input of the specified CRB and the state information required for processing the specified CRB into a hardware buffer; receiving the state information of the specified CRB that has been processed in the hardware accelerator; if the above physical storage locations are not vacant, then making physical storage locations that are closest on the request queue of the specified CRB as the selected location and storing the recei

Abstract: The invention discloses a system and method for reordering the request queue of the hardware accelerator, wherein, the request queue stores therein a plurality of coprocessor request blocks (CRBs) to be input into the hardware accelerator.