Patents by Inventor Xiaoming Han

Xiaoming Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250094170
    Abstract: One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute a 32-bit intermediate product of 16-bit operands and to compute a 32-bit sum based on the 32-bit intermediate product.
    Type: Application
    Filed: September 30, 2024
    Publication date: March 20, 2025
    Applicant: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Publication number: 20250061534
    Abstract: One embodiment provides a parallel processor comprising a hardware scheduler to schedule pipeline commands for compute operations to one or more of multiple types of compute units, a plurality of processing resources including a first sparse compute unit configured for input at a first level of sparsity and hybrid memory circuitry including a memory controller, a memory interface, and a second sparse compute unit configured for input at a second level of sparsity that is greater than the first level of sparsity.
    Type: Application
    Filed: August 29, 2024
    Publication date: February 20, 2025
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Nadathur Rajagopalan Satish, Jeremy Bottleson, Farshad Akhbari, Altug Koker, Narayan Srinivasa, Dukhwan Kim, Sara S. Baghsorkhi, Justin E. Gottschlich, Feng Chen, Elmoustapha Ould-Ahmed-Vall, Kevin Nealis, Xiaoming Chen, Anbang Yao
  • Patent number: 12213421
    Abstract: The present invention relates to nucleic acid sequences for detecting soybean plant DBN8002 and detection methods thereof, wherein said nucleic acid sequences comprise SEQ ID NO: 1 or a complementary sequence thereof, and/or SEQ ID NO: 2 or a complementary sequence thereof. The soybean plant DBN8002 of the present invention has good resistance against Lepidoptera insects as well as good tolerance to glufosinate herbicide without compromising the yield, and the detection methods can accurately and rapidly identify whether a biological sample contains the DNA molecule of the transgenic soybean event DBN8002.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: February 4, 2025
    Assignee: Beijing Dabeinong Biotechnology Co. Ltd.
    Inventors: Chao Han, Caihong Yu, Xiangting Xie, Dengyuan Wang, Shujing Yang, Guangdong Cui, Yuejing Kang, Xiaoming Bao
  • Patent number: 12217053
    Abstract: One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute an intermediate product of 16-bit operands and to compute a 32-bit sum based on the intermediate product.
    Type: Grant
    Filed: December 4, 2023
    Date of Patent: February 4, 2025
    Assignee: Intel Corporation
    Inventors: Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Kamal Sinha, Balaji Vembu, Nicolas C. Galoppo Von Borries, Eriko Nurvitadhi, Rajkishore Barik, Tsung-Han Lin, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Publication number: 20230287522
    Abstract: An automatic pathogen-from-expiration detection system and method is disclosed. The system comprises a gas pathogen recovery unit, a pathogen concentration unit and a sample detection unit.
    Type: Application
    Filed: August 6, 2021
    Publication date: September 14, 2023
    Inventors: Quanjun LIU, Xiaoxiang ZHOU, Zhanping LI, Zhen ZHANG, Xiaoming HAN, Ying XU, Yan HUANG, Zuhong LU
  • Publication number: 20230150811
    Abstract: The automatic identification hydrogen refueling system includes a ground positioning module, a hydrogen storage module, a mechanical arm, a refueling module, an automatic identification module and an information processing module. The ground positioning module is provided with a sensor. A hydrogen conveying pipeline is connected with the refueling module. The hydrogen storage module is arranged at a tail end of the ground positioning module, and connected with the mechanical arm, the information processing module and the hydrogen conveying pipeline. The information processing module controls the mechanical arm to drive the refueling module to preliminarily align a refueling connector after receiving a sensor signal.
    Type: Application
    Filed: July 13, 2022
    Publication date: May 18, 2023
    Inventors: Qiang LI, Jiabo ZHANG, Zhiqun SUN, Pengjun ZHANG, Xiaoming HAN, Pu QU
  • Publication number: 20220367958
    Abstract: The disclosure relates to the technical field of batteries, and particularly relates to a battery container, a battery pack, and a battery assembling method. The battery container includes a bottom plate, a first fixing member disposed on the bottom plate, and a second fixing member disposed on the bottom plate. The second fixing member and the first fixing member are arranged opposite to each other. A battery accommodating part is formed between the first fixing member and the second fixing member. A surface of the first fixing member facing the second fixing member has a first groove, and a surface of the second fixing member facing the first fixing member has a second groove. The first groove and the second groove are configured to remove a clamp from the battery container during assembly.
    Type: Application
    Filed: July 14, 2021
    Publication date: November 17, 2022
    Applicant: CALB Co., Ltd.
    Inventors: Fangfang Pan, Fanming Kong, Xucheng Yin, Ruisheng Tian, Tianrong Song, Xiaoming Han