Patents by Inventor Xiaona ZHU

Xiaona ZHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
    Publication number: 20220130679
    Abstract: A method for forming a semiconductor structure in provided. The method includes providing a substrate, forming a gate electrode layer on the substrate, and performing a defluorination treatment on the gate electrode layer. The method also includes, after performing the defluorination treatment, forming a barrier layer on a portion of a surface of the gate electrode layer. The barrier layer is made of a material including titanium element.
    Type: Application
    Filed: October 25, 2021
    Publication date: April 28, 2022
    Inventors: Hua WANG, Changyong XIAO, Yihui LIN, Qin ZHANG, Yi LU, Xiang HU, Xiaona ZHU, Ying JIANG
  • Semiconductor devices and fabrication methods thereof
    Patent number: 10847425
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of gate structures, a source/drain doped layer, a barrier layer, and a dielectric layer on a base substrate. The barrier layer covers the entire top surfaces of the plurality of gate structures. The dielectric layer covers the source/drain doped layer, the barrier layer, and the gate structures. The method further includes forming a plurality of first vias in the dielectric layer on both sides of each gate structure above the source/drain doped layer; forming a plurality of second vias on the gate structures to expose the barrier layer; performing a pre-amorphizing implantation process on the surface of the source/drain doped layer at the bottom of the first vias; removing the barrier layer at the bottom of the second vias; and forming a metal silicide layer on the surface of the source/drain doped layer through a metal silicidation process.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: November 24, 2020
    Assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Yi Lu, Changyong Xiao, Yihui Lin, Qin Zhang, Hua Wang, Xiang Hu, Xiaona Zhu, Ying Jiang
  • SEMICONDUCTOR DEVICES AND FABRICATION METHODS THEREOF
    Publication number: 20200020590
    Abstract: A method for fabricating a semiconductor device includes forming a plurality of gate structures, a source/drain doped layer, a barrier layer, and a dielectric layer on a base substrate. The barrier layer covers the entire top surfaces of the plurality of gate structures. The dielectric layer covers the source/drain doped layer, the barrier layer, and the gate structures. The method further includes forming a plurality of first vias in the dielectric layer on both sides of each gate structure above the source/drain doped layer; forming a plurality of second vias on the gate structures to expose the barrier layer; performing a pre-amorphizing implantation process on the surface of the source/drain doped layer at the bottom of the first vias; removing the barrier layer at the bottom of the second vias; and forming a metal silicide layer on the surface of the source/drain doped layer through a metal silicidation process.
    Type: Application
    Filed: July 15, 2019
    Publication date: January 16, 2020
    Inventors: Yi LU, Changyong XIAO, Yihui LIN, Qin ZHANG, Hua WANG, Xiang HU, Xiaona ZHU, Ying JIANG