Abstract: Embodiments of this disclosure disclose a display panel and a manufacturing method thereof, as well as a display device. The display panel comprises an upper substrate and a lower substrate arranged opposite to each other and packaged together, and further comprises an electrically controlled deformable film arranged on a surface of the upper substrate facing away from the lower substrate. The electrically controlled deformable film is configured to adjust its curvature based on a voltage applied on the electrically controlled deformable film, and enable a curvature of the upper substrate and a curvature of the lower substrate to be adjusted synchronously.

Abstract: A shift register unit is disclosed which includes an input module, a reset module, a node control module, a first output module and a second output module. Each of the shift register units can output two scan signals that have a phase difference with respect to each other. Also disclosed are a gate driver circuit and a display device.

Abstract: A display device, a method for controlling the display device, and a wearable device are provided. The display device includes an organic light-emitting structural layer; at least one control assembly including a color filter layer and a control electrode layer; and a control circuit. The color filter layer is closer to the organic light-emitting structural layer than the control electrode layer, the color filter layer includes color filter regions and light-transmissible regions arranged alternately, the control electrode layer includes first electrodes, each first electrode is on one color filter region corresponding to the first electrode and light transmittance of the first electrode is changeable under voltages. The control circuit is connected to the first electrodes and applies the voltages to the first electrodes so as to control the light transmittance of the first electrodes.

Abstract: Embodiments of the disclosure relate to a technical field of liquid crystal display technology, and disclose a display panel and a display device, the display panel including: an array substrate; and a first metal layer and pixel electrodes, both being formed on the array substrate, the first metal layer forming data lines, wherein the display panel further comprises a plurality of first electrodes which are arranged to be spaced apart from one another and provided between the first metal layer and a layer in which the pixel electrodes are located.

Abstract: The present application discloses a shift register unit circuit including an input port for receiving an input signal, an output port for outputting a gate driving signal, a first clock input port for receiving a first clock signal, a second clock input port for receiving a second clock signal, a pull-up node, a first pull-down node, a second pull-down node, a pull-up control sub-circuit connected to the input port and the pull-up node, a pull-up sub-circuit connected to the first clock input port and the pull-up node, a pull-down control sub-circuit connected to the first clock input port, a pull-down sub-circuit connected to the first pull-down node and the second pull-down node, a reset sub-circuit receiving a reset signal to control the potential level at the second pull-down node, and an initialization sub-circuit configured to receive an enabling signal for pulling-down the potential level at the second pull-down node.

Abstract: A mask plate is provided. The mask plate includes a first transparent substrate. A first transparent electrode, an electrochromic layer and a second transparent electrode are arranged sequentially on the first transparent substrate. The first transparent electrode is configured to be selectively powered so as to form energized regions with different shapes. A method for manufacturing the mask plate, a device including the mask plate, and a method for using the mask plate are further provided.

Abstract: A display panel and a display device are disclosed, and in a first substrate of the display panel, the first alignment film includes a plurality of first portions corresponding to the plurality of first alignment adjustment structures each having a first surface, the fluctuation direction of the first surface and the fluctuation direction of each first portion are consistent with the alignment direction of liquid crystal molecules in the liquid crystal layer induced by the first alignment film; in a second substrate of the display panel, the second alignment film includes a plurality of second portions corresponding to the plurality of second alignment adjustment structures, the fluctuation direction of the second surface and the fluctuation direction of each second portion are consistent with the alignment direction of the liquid crystal molecules in the liquid crystal layer induced by the second alignment film.

Abstract: A display panel and a method for fabricating the same are disclosed. The display panel includes a first substrate, a second substrate which is arranged oppositely to the first substrate, a frame sealant which is arranged between the first substrate and the second substrate, and a black matrix which is arranged on the second substrate. A projection of the black matrix on the first substrate does not overlap a projection of the frame sealant on the first substrate. This facilitates completely exposing the frame sealant to a curing UV light. This improves a curing efficiency of the frame sealant, increases the adhesiveness of the frame sealant, and avoids the problem of liquid crystal leakage due to breakage of the frame sealant.

Abstract: The present application discloses a gate driver on array (GOA) unit, including: a buffering module, a pull-up module, a pull-down module, a retaining module, a charging module, and a discharging module, a pull-up node being coupled to the buffering module, the discharging module, the pull-up module, and the charging module, and a pull-down node being coupled to the discharging module and the retaining module. The buffering module, being coupled to an input signal terminal and a pull-up node and controlled by a voltage of the input signal terminal, is configured to output the voltage of the input signal terminal into the pull-up node. The pull-up module, being coupled to a first clock signal terminal, the pull-up node, and an output signal terminal and controlled by a voltage of the pull-up node, is configured to output a voltage of the first clock signal terminal into the output signal terminal.

Abstract: The present application discloses a shift register unit circuit including an input port for receiving an input signal, an output port for outputting a gate driving signal, a first clock input port for receiving a first clock signal, a second clock input port for receiving a second clock signal, a pull-up node, a first pull-down node, a second pull-down node, a pull-up control sub-circuit connected to the input port and the pull-up node, a pull-up sub-circuit connected to the first clock input port and the pull-up node, a pull-down control sub-circuit connected to the first clock input port, a pull-down sub-circuit connected to the first pull-down node and the second pull-down node, a reset sub-circuit receiving a reset signal to control the potential, level at the second pull-down node, and an initialization sub-circuit configured to receive an enabling signal for pulling-down the potential level at the second pull-down node.

Abstract: An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura.

Abstract: The present application discloses a gate driver on array (GOA) unit, including: a buffering module, a pull-up module, a pull-down module, a retaining module, a charging module, and a discharging module, a pull-up node being coupled to the buffering module, the discharging module, the pull-up module, and the charging module, and a pull-down node being coupled to the discharging module and the retaining module. The buffering module, being coupled to an input signal terminal and a pull-up node and controlled by a voltage of the input signal terminal, is configured to output the voltage of the input signal terminal into the pull-up node. The pull-up module, being coupled to a first clock signal terminal, the pull-up node, and an output signal terminal and controlled by a voltage of the pull-up node, is configured to output a voltage of the first clock signal terminal into the output signal terminal.

Abstract: A shift register unit is disclosed which includes an input module, a reset module, a node control module, a first output module and a second output module. Each of the shift register units can output two scan signals that have a phase difference with respect to each other. Also disclosed are a gate driver circuit and a display device.

Abstract: The present application discloses a substrate comprising a base substrate; a black matrix layer comprising an array of a plurality of black matrixes on a first side of the base substrate; and a plurality of electrophoresis cells on the first side of the base substrate. Each of the plurality of electrophoresis cells comprises a first electrode, a second electrode, a mixture of an electrophoresis media and charged particle. The charged particles are movable in response to an electrical signal.

Abstract: An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura.

Abstract: The present provides a display device and a method for manufacturing the same. The display device includes a first substrate and a second substrate arranged opposite to each other to form a display panel. A deformation layer is arranged on any surface of the display panel. Through the deformation layer on any surface of the display panel, when the deformation layer reaches a first deformation temperature, the deformation layer generates a deformation so as to apply an internal force to the display panel. Because the display panel is of a constant size, it is curved due to the internal force, so as to achieve curved-surface display. In other words, the display panel is curved under the effect of the internal force generated by itself, and it may be always maintained at its curved shape when the internal force is applied continuously.

Abstract: An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura.

Abstract: An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura.

Abstract: Embodiments of this disclosure dislcose a display panel and a manufacturing method thereof, as well as a display device. The display panel comprises an upper substrate and a lower substrate arranged opposite to each other and packaged together, and further comprises an electrically controlled deformable film arranged on a surface of the upper substrate facing away from the lower substrate. The electrically controlled deformable film is configured to adjust its curvature based on a voltage applied on the electrically controlled deformable film, and enable a curvature of the upper substrate and a curvature of the lower substrate to be adjusted synchronously.

Abstract: The present application discloses a substrate comprising a base substrate; a black matrix layer comprising an array of a plurality of black matrixes on a first side of the base substrate; and a plurality of electrophoresis cells on the first side of the base substrate. Each of the plurality of electrophoresis cells comprises a first electrode, a second electrode, a mixture of an electrophoresis media and charged particle. The charged particles are movable in response to an electrical signal.