Abstract: A circuit includes a digital converter configured to convert an input signal to an output signal. The digital converter is configured to provide the output signal with at least one of a plurality of different output resolutions during each frame based on a control input. A resolution controller is configured to provide the control input to set the resolution of the digital converter to include at least two of the plurality of different output resolutions during each respective frame, such that an aggregate resolution for the digital converter is maintained below a predetermined threshold over time. The aggregate resolution is based on a ratio of the different output resolutions during each respective frame.

Abstract: A switched current pipeline analog-to-digital converter (ADC) integrated circuit. The integrated circuit comprises a track and hold circuit (T/H) and a residue amplifier. The T/H is configured to generate a differential output of the T/H based on an analog input. The residue amplifier is coupled to the T/H, configured to capture a sample of a common mode signal of the differential output of the T/H during a periodic pulse interval, wherein the pulse interval is less than half of the time duration of the period of the pulse, configured to generate a corrected input common mode feedback signal based in part on the sample of the common mode signal of the differential output of the T/H, and configured to generate a differential output of the residue amplifier based on the differential output of the T/H and based on the corrected input common mode feedback signal.

Abstract: The present invention provides a pharmaceutical composition comprising Protein Kinase C Zeta (PKC-?) inhibitor and therapeutic methods for preventing or treating a pathological condition or symptom or for inducing proliferation of lung progenitor cells in a mammal by administering the PKC-? inhibitor.

Abstract: A switched current pipeline analog-to-digital converter (ADC) integrated circuit. The integrated circuit comprises a track and hold circuit (T/H) and a residue amplifier. The T/H is configured to generate a differential output of the T/H based on an analog input. The residue amplifier is coupled to the T/H, configured to capture a sample of a common mode signal of the differential output of the T/H during a periodic pulse interval, wherein the pulse interval is less than half of the time duration of the period of the pulse, configured to generate a corrected input common mode feedback signal based in part on the sample of the common mode signal of the differential output of the T/H, and configured to generate a differential output of the residue amplifier based on the differential output of the T/H and based on the corrected input common mode feedback signal.

Abstract: A circuit includes a digital converter configured to convert an input signal to an output signal. The digital converter is configured to provide the output signal with at least one of a plurality of different output resolutions during each frame based on a control input. A resolution controller is configured to provide the control input to set the resolution of the digital converter to include at least two of the plurality of different output resolutions during each respective frame, such that an aggregate resolution for the digital converter is maintained below a predetermined threshold over time. The aggregate resolution is based on a ratio of the different output resolutions during each respective frame.

Abstract: A method and apparatus for a digital video display. A digital display device receives an analog signal representing an image formed of pixels in video lines and a signal containing a synchronization waveform for the image. An analog-to-digital converter (ADC) receives the analog signal and converts it to a sampled digital waveform. A phase-locked loop including a programmable frequency divider controls the sampling time for the ADC. The programmable frequency divider is controlled by a dividing-ratio algorithm that selects a dividing ratio, measures the number of pixels in a video line using the dividing ratio, and recomputes the dividing ratio by multiplying the selected dividing ratio by the expected number of pixels in a video line and dividing by the measured number of pixels. The sampling phase for the ADC is selected by a sampling-phase control algorithm that minimizes a function representative of the flatness of the sampled digital waveform.

Abstract: The present invention relates to a magnetic suspension bearing supported by magnetic force, which comprises one or more magnets fixed on a shaft directly or indirectly which can rotate with said shaft, and matching magnets provided in a certain space, wherein the magnetic polarity and magnitude of magnetic force of the matching magnets match with the magnetic polarity and magnitude of magnetic force of said one or more magnets to achieve the full suspension rotation of said shaft, and said magnets and/or matching magnets are permanent magnets. The present invention is of simple design and large power, with many other advantages such as great rigidity and great load-bearing capability and widely use in various fields.

Abstract: A method and apparatus for a digital video display. A digital display device receives an analog signal representing an image formed of pixels in video lines and a signal containing a synchronization waveform for the image. An analog-to-digital converter (ADC) receives the analog signal and converts it to a sampled digital waveform. A phase-locked loop including a programmable frequency divider controls the sampling time for the ADC. The programmable frequency divider is controlled by a dividing-ratio algorithm that selects a dividing ratio, measures the number of pixels in a video line using the dividing ratio, and recomputes the dividing ratio by multiplying the selected dividing ratio by the expected number of pixels in a video line and dividing by the measured number of pixels. The sampling phase for the ADC is selected by a sampling-phase control algorithm that minimizes a function representative of the flatness of the sampled digital waveform.

Abstract: To make use of its full input voltage operating range, an analog-to-digital converter is configured with a switched-capacitor circuit to produce a digital output signal from an analog input signal that lies within a range of input signal voltage. The analog-to-digital converter is configured with an amplifier with a digitally programmable gain and a voltage generator with a digitally controlled output voltage. The voltage generator is coupled through a buffer to the amplifier input and generates an output voltage inversely proportional to the amplifier gain. The amplifier gain and the voltage generator output voltage are controllable with the same digital control signal. The combination of the amplifier and the voltage generator can be configured to produce a voltage for the analog-to-digital converter that lies in a prescribed voltage range, avoiding the need to generate substantial current from the voltage generator for a switched-capacitor circuit.

Abstract: A shunt-shunt feedback current to voltage converter (60) including a compensating current (22) provided to the output of the amplifier (12) which mirrors the input current (14) advantageously removing the loading effects of the feedback resistor (Rf) to the amplifier (12). A current steering DAC (40) is utilized in conjunction with a plurality of polarity control switches (62) to provide either a source current or a sink current to the amplifier input, and a complementary sink current or source current, respectively, to the output of the amplifier such that the amplifier (12) does not provide any current to the feedback resistor. Thus, DC gain of the amplifier is maintained. The current steering DAC (40) provides a matched source current and sink current to achieve this architecture.

Abstract: The present invention relates to a magnetic suspension bearing supported by magnetic force, which comprises one or more magnets fixed on a shaft directly or indirectly which can rotate with said shaft, and matching magnets provided in a certain space, wherein the magnetic polarity and magnitude of magnetic force of the matching magnets match with the magnetic polarity and magnitude of magnetic force of said one or more magnets to achieve the full suspension rotation of said shaft, and said magnets and/or matching magnets are permanent magnets. The present invention is of simple design and large power.

Abstract: A shunt-shunt feedback current to voltage converter (60) including a compensating current (22) provided to the output of the amplifier (12) which mirrors the input current (14) advantageously removing the loading effects of the feedback resistor (Rƒ) to the amplifier (12). A current steering DAC (40) is utilized in conjunction with a plurality of polarity control switches (62) to provide either a source current or a sink current to the amplifier input, and a complementary sink current or source current, respectively, to the output of the amplifier such that the amplifier (12) does not provide any current to the feedback resistor. Thus, DC gain of the amplifier is maintained. The current steering DAC (40) provides a matched source current and sink current to achieve this architecture.