Abstract: The present invention pertains to the technical field of semiconductor memory. More particularly, the invention relates to a method for integrating MnOz based resistive memory with copper interconnection back-end process. In the method for integrating with the process, a MnSi compound layer is firstly formed by silicifying Mn metal in the cap layer on Cu wire, a MnSixOy storage medium layer is formed by oxidizing the MnSi compound layer, and a MnSiO compound layer serves as a barrier layer for Cu wire in the copper interconnection back-end. The method has the advantage of be easily compatible with a copper interconnection back-end process at or below 45 nm process node. The MnOz based resistive memory is low in fabrication cost, high in reliability and low in power consumption.

Abstract: The present invention pertains to the technical field of semi-conductor memory. More particularly, the invention relates to a resistive memory based on TaOx containing Ru doping. The resistive memory comprises an upper electrode, a lower electrode and a TaOx based storage medium layer containing Ru doping and provided between the upper electrode and the lower electrode. In the storage medium layer based on TaOx containing Ru doping, the position at which conductive filaments are formed in the storage medium layer based on TaOx and their number can be effectively controlled through the distributed Ru element, thus avoiding the possibility of random formation. Therefore, the storage performance is more stable and fluctuation of device characteristic parameter is small. Meanwhile, an integration with copper interconnection process at or below 32 nm is made easier.