Abstract: The present disclosure provides a bandgap reference circuit which includes a basic reference module to generate a basic reference voltage containing a first linear temperature-coefficient (TC) voltage and a first nonlinear TC voltage when a terminal node in the basic reference module is grounded. The bandgap reference circuit further includes a compensation module with an output node coupled to the terminal node of the basic reference module. The compensation module generates a compensation voltage at the output node with a second linear TC term and a second nonlinear TC term by using a first set of current sources proportional to absolute temperate (PTAT) and a second set of current sources with TC of zero. And the bandgap reference circuit combines the basic reference voltage and the compensation voltage, cancelling all the linear and nonlinear terms, and thus create a composite reference voltage independent of temperature.

Abstract: The present disclosure provides a bandgap reference circuit which includes a basic reference module to generate a basic reference voltage containing a first linear temperature-coefficient (TC) voltage and a first nonlinear TC voltage when a terminal node in the basic reference module is grounded. The bandgap reference circuit further includes a compensation module with an output node coupled to the terminal node of the basic reference module. The compensation module generates a compensation voltage at the output node with a second linear TC term and a second nonlinear TC term by using a first set of current sources proportional to absolute temperate (PTAT) and a second set of current sources with TC of zero. And the bandgap reference circuit combines the basic reference voltage and the compensation voltage, cancelling all the linear and nonlinear terms, and thus create a composite reference voltage independent of temperature.

Abstract: A multistage amplifier may include a multistage amplifier circuit and a resistive voltage divider network. The multistage amplifier circuit may have multiple transconductance input stages, each of which may have differential inputs and an adjustable tail current input that controls the amount of the transconductance of the input stage. The resistive voltage divider network may control the closed loop gain of the multistage amplifier circuit and include multiple resistors that provide different voltage divider ratios at different points. Each point may be connected to one of the transconductance input stages. Adjustment of tail currents at the tail current inputs may control the degree to which each point affects the closed loop gain of the multistage amplifier.

Abstract: A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

Abstract: A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

Abstract: A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

Abstract: A transponder having a dynamic remapping circuit remaps a value of decision threshold voltage Vdtc and a value of optical power RXP to a reference voltage Vref to minimize the bit error rate BER of a communication system. The dynamic remapping circuit implements a bilinear mapping of Vdtc and RXP to Vref with three bilinear remapping constants “a”, “b”, and “c” selected to align a remapped value of Vdtc_opt to a selected Vdtc normalization value, Vdtc_norm. A transponder in accord with an embodiment of the invention prevents BER from exceeding a threshold value of BER whether RXP or OSNR, or both, remain constant, change continuously, or change intermittently. Constants “a”, “b”, and “c” are related to parameters resulting from mathematically fitting a line to data comprising Vdtc_opt versus RXP. Another embodiment comprises a method for dynamically optimizing Vdtc and RXP to Vref in a transponder with a bilinear remapping circuit.

Abstract: A tristable latch circuit fabricated utilizing standard MOS process technology includes a biasing element for identically biasing the MOS transistors in triode (as opposed to saturation) to implement a third stable operating point.

Abstract: A tristable latch circuit fabricated utilizing standard MOS process technology includes a biasing element for identically biasing the MOS transistors in triode (as opposed to saturation) to implement a third stable operating point.