Abstract: A control circuit for an isolated power supply is disclosed, the control circuit includes a secondary-side drive signal generator, a secondary-side transistor switch turn-off detector and a primary-side control signal generator. The primary-side control signal generator is configured to: determine a second turn-on instant referring to an turn-off instant of the secondary-side synchronous rectification transistor from the turn-off acknowledgement signal; determine a first turn-on instant referring to a supposed turn-on instant for the primary-side transistor switch from the feedback signal of the output voltage of the isolated power supply; and determine the turn-on instant for the primary-side transistor switch from the second turn-on instant or the first turn-on instant whichever is later, and responsively generate the primary-side transistor switch control signal.

Abstract: A controller and an isolated power converter are disclosed. The controller includes: a bypass terminal coupled to a bypass capacitor; a first power circuit coupled to the bypass terminal and a first terminal, the first terminal configured to transfer electric charge from the first terminal to the bypass terminal; a second power circuit coupled to the first terminal, a second terminal and a third terminal, the second and third terminals coupled to a flying capacitor, the second power circuit configured to transfer electric charge from the first terminal to the flying capacitor; and a charging control circuit coupled to control the first or second power circuit to transfer electric charge to the bypass terminal, in response to at least one of a voltage at the bypass terminal and a voltage at the first terminal. The present invention eliminates influence of switching frequency variation and reduces sensitivity to an output voltage.

Abstract: The present invention provides a built-in ripple injection circuit and a control chip, in which a divided feedback voltage is obtained by division of an output voltage by a feedback circuit, and high-frequency ripple in the output voltage is obtained by an operational amplifier and a first capacitor. Moreover, the high-frequency ripple is injected at a third terminal of a source follower. As a result, the feedback voltage is a superimposition of the divided feedback voltage with the high-frequency ripple. This can enhance stability and interference resilience of a power supply system operating in a ripple-based COT control mode. Further, the built-in ripple circuit can be integrated in the control chip. This dispenses with the use of a large capacitor and satisfactorily addresses applications requiring on-chip integration of the feedback circuit, reducing the cost of the power supply system.

Abstract: A controller chip of a flyback converter, a flyback converter and a switched-mode power supply system are disclosed. In the controller chip, a current scaling module is added, which converts a feedback current signal at a feedback pin of the controller chip to allow compensation capacitor with a small capacitance to be integrated into the chip to constitute a required pole compensation module. In this way, a pole required by the feedback pin FB can be successfully provided in the chip. As a result, filtering of high-frequency noise in a feedback path in which the feedback pin FB is located can be achieved, reducing ripple in an output voltage generated by the flyback converter. Moreover, without changing a sampling gain and the compensation pole, it is allowed to greatly reduce the compensation capacitance, for example, to the order of 10 pF.

Abstract: An output short-circuit protection method, a power management chip and a switched-mode power supply are disclosed. When current accumulation has occurred in a power transistor, the number of consecutive current pulses during which the current accumulation occurred is counted. Upon the number of consecutive current pulses reaches a preset value, a regulation interval spanning switching periods is triggered, for at least some of the switching periods, the leading-edge blanking time is shortened or cancelled. In this way, an excessively large current flowing through the power transistor is prevented. Compared with existing fault response measures for power management chips, restart of the power supply and adjustment of the system timing are not needed, allowing easier implementation. Further, the automatic restart during chip start up due to false triggering as found in the existing measures for power management chips is circumvented.

Abstract: A control circuit for an isolated power supply and an isolated power supply are disclosed. The control circuit includes a secondary-side and a primary-side control signal generation circuits. In a present switching period, the secondary-side control signal generation circuit provides an indication for turning on asynchronous rectification transistor when detecting that a voltage across a secondary-side winding reaches a first predetermined voltage and provides an indication for turning off the synchronous rectification transistor when a period of time over which the synchronous rectification transistor is conducted reaches a first conduction time. The first conduction time is adjustable based on a first instant at which an indication for turning off the synchronous rectification transistor was provided in a previous switching period, a second instant at which an indication for turning on a primary-side switching transistor was provided in the previous switching period and a predetermined reference period.

Abstract: A control circuit for an isolated power supply and an isolated power supply are disclosed. The control circuit includes a secondary control signal generation circuit, which, when detecting a voltage of a secondary winding reaches a first preset voltage value after a primary switching transistor is turned off, provides an instruction to turn on a synchronous rectification transistor. Following elapse of a predetermined period of time after the synchronous rectification transistor is turned on, the secondary control signal generation circuit detects a voltage/current of the synchronous rectification transistor, obtains a first electrical signal and derives a second electrical signal from the first electrical signal. When further detecting that the voltage/current of the synchronous rectification transistor reaches the value of the second electrical signal, the secondary control signal generation circuit provides an instruction to turn off the synchronous rectification transistor.

Abstract: A high power factor control circuit is disclosed, which is used in an AC/DC converter. The converter includes a rectification module, a conversion module and a load. The rectification module receives AC power and rectifies it into a DC current, and the conversion module converts the DC current to drive power as desired by the load and provides it to the load. The conversion module includes a conversion element including an inductive element and a switching element. The control circuit includes a peak limiting signal generator and a switching element control module. The peak limiting signal generator receives a reference signal and produces at least one peak limiting signal from a sample signal. The switching element control module is configured to control switching of the switching element so that, within at least half a line-frequency period, a value of the ripple in the output current flowing through the load is not greater than a limit value.

Abstract: A control circuit for an isolated power supply is disclosed, the control circuit includes a secondary-side drive signal generator, a secondary-side transistor switch turn-off detector and a primary-side control signal generator. The primary-side control signal generator is configured to: determine a second turn-on instant referring to an turn-off instant of the secondary-side synchronous rectification transistor from the turn-off acknowledgement signal; determine a first turn-on instant referring to a supposed turn-on instant for the primary-side transistor switch from the feedback signal of the output voltage of the isolated power supply; and determine the turn-on instant for the primary-side transistor switch from the second turn-on instant or the first turn-on instant whichever is later, and responsively generate the primary-side transistor switch control signal.

Abstract: A control method and control circuit for a switched-mode power supply (SMPS) and a control chip are disclosed. The SMPS is switched between different operating modes based on different levels of its output voltage. When the output voltage is lower than a first reference and the difference between it and the first reference exceeds a threshold, an operating frequency of a power transistor and output voltage are controlled to satisfy a proportional relationship defined by an associated slope. When the output voltage is lower than the first reference and the difference between it and the first reference is below the threshold, the power transistor is controlled to operate at a fixed frequency. When the output voltage is higher than the first reference, the power transistor is controlled to operate at a variable frequency.

Abstract: Isolated power supply control circuits, isolated power supply and control method thereof are disclosed, the control circuit for controlling an isolated power supply includes a secondary-side control signal generator and a primary-side control signal generator. The secondary-side control signal generator produces a secondary-side transistor switch control signal containing information about a turn-off instant of a secondary-side synchronous rectification transistor, which serves as a second turn-on instant. The primary-side control signal generator derives, from a feedback signal, a supposed turn-on instant for a primary-side transistor switch, which serves as a first turn-on instant. The primary side turn-on signal generator further derives a turn-on instant for the primary-side transistor switch from the second or first turn-on instant whichever is later and responsively generates a primary-side transistor switch control signal.

Abstract: A switch-mode power supply (SMPS), an SMPS system and a power supply method for an SMPS system are disclosed. The SMPS controller includes an output-voltage power supply unit, a built-in energy storage unit and a logic control unit. The output-voltage power supply unit is configured to charge the built-in energy storage unit using an output voltage from the SMPS system so that the built-in energy storage unit can provide an operating voltage for the logic control unit. The use of a stand-off energy storage capacitor can be dispensed with, and the use of the output voltage as a power supply is enabled. As a result, significant reductions in overall and standby power dissipation are achieved. In addition, the SMPS controller may further include a high-voltage power supply unit, which provides a hybrid power supply solution, together with the output-voltage power supply unit.

Abstract: A control circuit, system and method for switched-mode power supply are disclosed, the control circuit is for driving a first switch to convert an input voltage into an output voltage. The control circuit includes an on-time control unit, which receives a first signal characterizing switching frequency of first switch and a second signal characterizing current flowing through first switch and responsively generates a signal indicative of a turn-off instant for first switch. When a peak value of the current flowing through the first switch drops below a predefined value, the on-time control unit determines the turn-off instant for the first switch based on the first signal so that the switching frequency of the first switch is maintained at a target frequency. This design can effectively avoid the generation of audible noise, stabilize the output voltage against load changes while maintaining desirable efficiency, and ensure operational safety of the switched-mode power supply.

Abstract: A control circuit, system and method for switched-mode power supply are disclosed, the control circuit is for driving a first switch to convert an input voltage into an output voltage. The control circuit includes an on-time control unit, which receives a first signal characterizing switching frequency of first switch and a second signal characterizing current flowing through first switch and responsively generates a signal indicative of a turn-off instant for first switch. When a peak value of the current flowing through the first switch drops below a predefined value, the on-time control unit determines the turn-off instant for the first switch based on the first signal so that the switching frequency of the first switch is maintained at a target frequency. This design can effectively avoid the generation of audible noise, stabilize the output voltage against loading changes while maintaining desirable efficiency, and ensure operational safety of the switched-mode power supply.

Abstract: A control circuit, a chip and a control method are disclosed. The control circuit includes: an adjustment signal generation unit configured to detect an electrical signal reflecting a power supplied to a load under control of a current value of a reference signal, generate a feedback signal and output an adjustment signal based on both the feedback signal and the reference signal; and a control unit coupled to the adjustment signal generation unit and configured to control the switching circuit on and off based on the adjustment signal. With the generated adjustment signal that reflects a change in an adjustment metric indicated in the reference signal, the control circuit and the driving system can be adapted in real time to the specifications of any AC power standard. Moreover, much more granular adjustments can be made in the power supplied to the load.

Abstract: A controller chip of a flyback converter, a flyback converter and a switched-mode power supply system are disclosed. In the controller chip, a current scaling module is added, which converts a feedback current signal at a feedback pin of the controller chip to allow compensation capacitor with a small capacitance to be integrated into the chip to constitute a required pole compensation module. In this way, a pole required by the feedback pin FB can be successfully provided in the chip. As a result, filtering of high-frequency noise in a feedback path in which the feedback pin FB is located can be achieved, reducing ripple in an output voltage generated by the flyback converter. Moreover, without changing a sampling gain and the compensation pole, it is allowed to greatly reduce the compensation capacitance, for example, to the order of 10 pF.

Abstract: A control circuit, a control chip and a power supply device are disclosed by the present invention. The control circuits are used for control of a constant-voltage closed-loop which causes a voltage of a voltage feedback signal obtained from an output voltage to approach a voltage of a reference voltage signal obtained from a base voltage and thereby achieves a constant-voltage output. In addition, when a sampled current obtained from an output current is higher than a predetermined current, or when output power is higher than a predetermined power, the control circuit increases the voltage feedback signal or decreases the reference voltage signal, causing the constant-voltage closed loop to decrease the output voltage and the output current and thereby achieving a limited output current and limited output power.

Abstract: An operation circuit and a chip pertaining to the field of integrated circuit design technology are disclosed by the present application. The circuit includes a capacitor charging/discharging module and an error amplification module electrically connected to the capacitor charging/discharging module. The capacitor charging/discharging module is configured to receive a first signal and a third signal that are external to the capacitor charging/discharging module and to output a feedback signal. The error amplification module is configured to receive the feedback signal and a second signal that is external to error amplification module and to output, based on the received feedback and second signals, a target signal to the capacitor charging/discharging module. In a steady state, values of the target, first, second and third signals satisfy a predefined mathematical relationship.

Abstract: An output short-circuit protection method, a power management chip and a switched-mode power supply are disclosed. When current accumulation has occurred in a power transistor, the number of consecutive current pulses during which the current accumulation occurred is counted. Upon the number of consecutive current pulses reaches a preset value, a regulation interval spanning switching periods is triggered, for at least some of the switching periods, the leading-edge blanking time is shortened or cancelled. In this way, an excessively large current flowing through the power transistor is prevented. Compared with existing fault response measures for power management chips, restart of the power supply and adjustment of the system timing are not needed, allowing easier implementation. Further, the automatic restart during chip start up due to false triggering as found in the existing measures for power management chips is circumvented.

Abstract: An operation circuit and a chip pertaining to the field of integrated circuit design technology are disclosed by the present invention. The circuit includes a capacitor charging/discharging module and an error amplification module electrically connected to the capacitor charging/discharging module. The capacitor charging/discharging module is configured to receive first, second and third signals external to the capacitor charging/discharging module, and to output a reference signal and a feedback signal. The error amplification module is configured to receive the reference and feedback signals and output a target signal to the capacitor charging/discharging module based on the received reference and feedback signals. The first, second and third signals are all analog signals, and in a steady state, values of the target, first, second and third signals satisfy a predefined mathematical relationship.