Abstract: In one embodiment, a method of controlling a switching power supply, can include: (i) generating a driving current signal that follows a waveform of a sense voltage signal, where the sense voltage signal is related to a current through a collector of a transistor that is configured as a power switch of the switching power supply, where the collector is coupled to an inductive element of the switching power supply; (ii) providing the driving current signal to a base of the transistor, where the transistor is in a saturated conduction state when a pulse-width modulation (PWM) signal is active; and (iii) releasing charge accumulated on the base when the PWM signal is inactive to turn off the transistor.

Abstract: In one embodiment, a controlling circuit configured for an AC/DC converter that receives an AC voltage supply, can include: (i) a compensation signal generator configured to generate a compensation signal that follows an error between an output signal from the AC/DC converter and an expected converter output signal during a first time interval of a half period of the AC voltage supply, the compensation signal being substantially constant during a remaining time interval of the half period; and (ii) a controlling signal generator configured to generate a controlling signal based on the compensation signal to maintain the output signal as substantially consistent with the expected converter output signal.

Abstract: In one embodiment, a voltage peak detection circuit can include: (i) a voltage coupling circuit configured to inductively couple an input inductor voltage of a switching power supply, and to generate a first voltage that represents a DC input voltage of the switching power supply; (ii) a voltage conversion circuit configured to receive the first voltage, and to generate a second voltage that is proportional to the first voltage; and (iii) a holding circuit configured to hold a peak of the second voltage to generate a peak voltage signal that represents peak information of the DC input voltage.

Abstract: A voltage sense control circuit configured for an isolated converter can include: a current sampling and holding circuit configured to sample a current through a power switch to obtain a voltage sense signal that represents current information of the power switch, where the voltage sense signal is in proportion to a forward voltage drop of a rectifier device; a compensation signal generating circuit configured to generate a first current signal according to the voltage sense signal, and to generate a compensation signal according to the first current signal to compensate an output voltage feedback signal of the isolated converter to obtain a voltage feedback signal; and a voltage sampling and holding circuit configured to sample and hold the voltage feedback signal to regulate an output voltage of the isolated converter to be stable.

Abstract: In one embodiment, an active power factor correction (APFC) control circuit, configured to generate a pulse-width modulation (PWM) control signal to control the operation of a power converter, includes: (i) an inductor current zero crossing detection circuit coupled to a common node between a power switch of the power converter and a first switch that are coupled in series, where the inductor current zero crossing detection circuit is configured to generate a comparison signal based on a voltage signal at the common node; (ii) the comparison signal being activated when an inductor current of the power converter decreases to zero; and (iii) the APFC control circuit being configured as a source driver, wherein a control terminal of the power switch is coupled to a constant voltage supply.

Abstract: In one embodiment, an output overvoltage protection method for a switching power supply, can include: (i) charging a first capacitor by a first current during a first time interval of a switching period of the switching power supply; (ii) charging a second capacitor by a second current during a second time interval of the switching period of the switching power supply; and (iii) generating an overvoltage protection signal by comparing a first voltage across the first capacitor against a second voltage across the second capacitor at the end of the second time interval, where the overvoltage protection signal is active when the first voltage is at least as high as the second voltage.

Abstract: In one embodiment, a zero-crossing detection circuit can include: (i) a first detection circuit configured to detect a current through a main transistor of a main circuit of a switching power supply, and to generate a voltage sense signal that represents the current through the main transistor; (ii) a second detection circuit configured to detect if quasi-resonance occurs in the main circuit, the second detection circuit being configured to generate at least one pulse signal when the quasi-resonance is detected; and (iii) a control circuit configured to receive the at least one pulse signal and the voltage sense signal, to turn the main transistor off when the current through the main transistor reaches a predetermined value, and to turn the main transistor on when the at least one pulse signal is active.

Abstract: In one embodiment, a voltage peak detection circuit can include: (i) a voltage coupling circuit configured to inductively couple an input inductor voltage of a switching power supply, and to generate a first voltage that represents a DC input voltage of the switching power supply; (ii) a voltage conversion circuit configured to receive the first voltage, and to generate a second voltage that is proportional to the first voltage; and (iii) a holding circuit configured to hold a peak of the second voltage to generate a peak voltage signal that represents peak information of the DC input voltage.

Abstract: In one embodiment, an undervoltage protection circuit for a switching power supply can include: (i) an undervoltage detection circuit that determines whether an input voltage of the switching power supply is in an undervoltage state; (ii) a selection circuit configured to select a first or a second control signal to be provided as a main control signal to a control circuit; (iii) the control circuit being configured, in response to the main control signal being the first control signal, to control a switching operation of a power transistor in the switching power supply such that an output voltage of the switching power supply is maintained as substantially stable; and (iv) the control circuit being configured, in response to the main control signal being the second control signal, to control the switching operation of the power transistor to reduce an input power of the switching power supply.

Abstract: In one embodiment, a method of compensating for transmission voltage loss from a switching power supply, can include: (i) receiving a sampling signal that represents an output current of the switching power supply; (ii) delaying the sampling signal to generate a delayed sampling signal; (iii) converting the delayed sampling signal to generate a compensation signal; and (iv) regulating an output voltage of the switching power supply based on the compensation signal to compensate for the transmission voltage loss from the output voltage transmission to a load such that a voltage at the load is maintained as substantially consistent with an expected voltage at the load.

Abstract: In one embodiment, a zero-crossing detection circuit can include: (i) a first detection circuit configured to detect a current through a main transistor of a main circuit of a switching power supply, and to generate a voltage sense signal that represents the current through the main transistor; (ii) a second detection circuit configured to detect if quasi-resonance occurs in the main circuit, the second detection circuit being configured to generate at least one pulse signal when the quasi-resonance is detected; and (iii) a control circuit configured to receive the at least one pulse signal and the voltage sense signal, to turn the main transistor off when the current through the main transistor reaches a predetermined value, and to turn the main transistor on when the at least one pulse signal is active.

Abstract: In one embodiment, a power switch driving circuit can include: (i) an upper switch having a first power terminal coupled to a voltage source, and a second power terminal coupled to a driving signal; (ii) a lower switch having a first power terminal coupled to the driving signal, and a second power terminal coupled to a first voltage level, where the first voltage level is higher than a first ground potential; (iii) an upper switch driving sub circuit configured to receive a control signal, and to drive the upper switch in response thereto; and (iii) a lower switch driving sub circuit configured to receive the control signal, and to drive the lower switch in response thereto, where the upper and lower switch driving sub circuits are coupled to a second ground potential.

Abstract: In one embodiment, a method of controlling a capacitor discharge for a switching power supply, can include: (i) generating a first voltage signal from a voltage at an X capacitor that is coupled between input terminals of the switching power supply; (ii) activating a detection signal in response to the first voltage signal being inactive for a duration of a predetermined time interval, where the detection signal being activated indicates a cut-off of the input terminals; and (iii) at least partially discharging the X capacitor after the cut-off and in response to activation of the detection signal.

Abstract: In one embodiment, an undervoltage protection circuit for a switching power supply can include: (i) an undervoltage detection circuit that determines whether an input voltage of the switching power supply is in an undervoltage state; (ii) a selection circuit configured to select a first or a second control signal to be provided as a main control signal to a control circuit; (iii) the control circuit being configured, in response to the main control signal being the first control signal, to control a switching operation of a power transistor in the switching power supply such that an output voltage of the switching power supply is maintained as substantially stable; and (iv) the control circuit being configured, in response to the main control signal being the second control signal, to control the switching operation of the power transistor to reduce an input power of the switching power supply.

Abstract: In one embodiment, a method of compensating for transmission voltage loss from a switching power supply, can include: (i) receiving a sampling signal that represents an output current of the switching power supply; (ii) delaying the sampling signal to generate a delayed sampling signal; (iii) converting the delayed sampling signal to generate a compensation signal; and (iv) regulating an output voltage of the switching power supply based on the compensation signal to compensate for the transmission voltage loss from the output voltage transmission to a load such that a voltage at the load is maintained as substantially consistent with an expected voltage at the load.

Abstract: A control circuit can include: a power supply circuit having a bias capacitor coupled between a power terminal and a common node, where the power supply circuit supplies power to the control circuit via the bias capacitor; a detection circuit coupled between the common node and a current output terminal of a main power switch of a power stage circuit, to detect current flowing through the main power switch; a current feedback circuit that generates a feedback signal according to a difference value between a sense value obtained from a voltage at the power terminal during an off state of the main power switch and a present voltage at the power terminal, where the feedback signal represents an inductor current of the power stage circuit; and a control signal generator that generates a control signal according to the feedback signal to control the main power switch.

Abstract: In one embodiment, an integrated switch mode power supply controller can include: a multiplexing pin that receives a detection voltage signal; a switch mode power supply that receives a DC input voltage, and operates in a switching cycle having first, second, and third time intervals; during the first time interval, the detection voltage signal is proportional to the DC input voltage, and a current compensation signal is generated according to the detection voltage signal to obtain a peak inductor current; during the second time interval, the detection voltage signal is proportional to an output voltage of the switch mode power supply, and a discharging duration of current through the inductor is determined based on the detection voltage signal; and during the third time interval, the detection voltage signal is proportional to a voltage across a power transistor of the switch mode power supply.

Abstract: The present invention discloses CVCC circuits and methods with improved load regulation for an SMPS. In one embodiment, the CVCC can include: a voltage feedback circuit to generate an output voltage feedback signal; a current feedback circuit to generate an output current feedback signal; a control signal generating circuit that receives the output voltage feedback signal and the output current feedback signal, and generates a constant voltage/constant current control signal; a first enable signal generating circuit that compares a first reference voltage and the constant voltage/constant current control signal to generate a first enable signal; and a PWM controller that generates a PWM control signal based on the constant voltage/constant current control signal to control a main switch of the flyback SMPS.

Abstract: In one embodiment, an active power factor correction (APFC) control circuit, configured to generate a pulse-width modulation (PWM) control signal to control the operation of a power converter, can include: (i) an inductor current zero crossing detection circuit coupled to a common node between a power switch of the power converter and a first switch that are coupled in series, where the inductor current zero crossing detection circuit is configured to generate a comparison signal based on a voltage signal at the common node; (ii) the comparison signal being activated when an inductor current of the power converter decreases to zero; and (iii) the APFC control circuit being configured as a source driver, wherein a control terminal of the power switch is coupled to a constant voltage supply.

Abstract: In one embodiment, an active power factor correction (APFC) control circuit, configured to generate a pulse-width modulation (PWM) control signal to control the operation of a power converter, can include: (i) an inductor current zero crossing detection circuit coupled to a common node between a power switch of the power converter and a first switch that are coupled in series, where the inductor current zero crossing detection circuit is configured to generate a comparison signal based on a voltage signal at the common node; (ii) the comparison signal being activated when an inductor current of the power converter decreases to zero; and (iii) the APFC control circuit being configured as a source driver, wherein a control terminal of the power switch is coupled to a constant voltage supply.