Abstract: An overcurrent protection circuit includes: a sampling sub-circuit configured to acquire gate input signals, select a gate input signal with a voltage value greater than a first preset voltage value as a sample gate input signal, generate a first control signal according to the sample gate input signal, and output the first control signal; a delay determination sub-circuit configured to receive the first control signal, delay the first control signal for a first preset time, determine whether a voltage value of the first control signal after delay is less than a voltage value of the first control signal before the delay, and if not, output a counting signal; and a counting control sub-circuit configured to receive the counting signal, perform counting according to the counting signal, and if a counted number reaches a preset number, output a second control signal.

Abstract: The present disclosure is related to a display device and a circuit board (200). The display device comprises a light-emitting module (100), a circuit board (200) and a conductive structure (300). The surface of the light-emitting module (100) is provided with a conductive portion (101). The circuit board (200) is arranged on a back face (102) of the light-emitting module (100), and has a first surface (201) close to the light-emitting module (100). The first surface (201) of the circuit board (200) is provided with an exposed external conductive layer (210), and the external conductive layer (210) is electrically connected to a ground wire of the circuit board (200). The conductive structure (300) is located between the circuit board (200) and the light-emitting module (100), and makes the external conductive layer (210) electrically connect to the conductive portion (101).

Abstract: An overcurrent protection circuit includes: a sampling sub-circuit configured to acquire gate input signals, select a gate input signal with a voltage value greater than a first preset voltage value as a sample gate input signal, generate a first control signal according to the sample gate input signal, and output the first control signal; a delay determination sub-circuit configured to receive the first control signal, delay the first control signal for a first preset time, determine whether a voltage value of the first control signal after delay is less than a voltage value of the first control signal before the delay, and if not, output a counting signal; and a counting control sub-circuit configured to receive the counting signal, perform counting according to the counting signal, and if a counted number reaches a preset number, output a second control signal.

Abstract: An electromagnetic interference suppression circuit, a driving method thereof, and an electronic apparatus are provided. In the electromagnetic interference suppression circuit, a signal generating sub-circuit may generate a plurality of parallel target sequence signals, each with a period greater than a period threshold and a quantity of target sequence signals greater than a quantity threshold; and a frequency generating sub-circuit may output a frequency-jittered drive signal, for driving a switch mode power supply to operate, to the switch mode power supply under the control of the plurality of parallel target sequence signals.

Abstract: The present disclosure is related to a display driving method. The display driving method may include obtaining a grayscale data voltage compensation table; calculating a value of VCOM shift amplitude corresponding to a row of sub-pixels on a display panel based on grayscale data voltages of a frame of an image to be displayed; obtaining a grayscale data voltage compensation value corresponding to the row of sub-pixels on the display panel based on the calculated value of VCOM shift amplitude and the grayscale data voltage compensation table; compensating grayscale data voltages actually inputted to the row of sub-pixels based on the grayscale data voltage compensation value to obtain compensated grayscale data voltages; and outputting the compensated grayscale data voltages to the row of sub-pixels during a display time of the frame of the image to be displayed.

Abstract: The present disclosure is related to a display driving method. The display driving method may include obtaining a grayscale data voltage compensation table; calculating a value of VCOM shift amplitude corresponding to a row of sub-pixels on a display panel based on grayscale data voltages of a frame of an image to be displayed; obtaining a grayscale data voltage compensation value corresponding to the row of sub-pixels on the display panel based on the calculated value of VCOM shift amplitude and the grayscale data voltage compensation table; compensating grayscale data voltages actually inputted to the row of sub-pixels based on the grayscale data voltage compensation value to obtain compensated grayscale data voltages; and outputting the compensated grayscale data voltages to the row of sub-pixels during a display time of the frame of the image to be displayed.

Abstract: The present disclosure provides a source driving circuit, a driving method, and a display device. The source driving circuit includes a gamma generating circuit, a gamma regulating circuit, and a control circuit. The gamma regulating circuit is configured to determine, according to a plurality of gamma reference voltage pairs, a first output voltage, a second output voltage, a third output voltage, and a fourth output voltage corresponding to each of the gamma reference voltage pairs. Further, the control circuit is configured to perform driving and displaying with the first output voltage in a first image frame, with the second output voltage in a second image frame, with the third output voltage in a third image frame, and with the fourth output voltage in a fourth image frame.

Abstract: The present disclosure provides a source driving circuit, a driving method, and a display device. The source driving circuit includes a gamma generating circuit, a gamma regulating circuit, and a control circuit. The gamma regulating circuit is configured to determine, according to a plurality of gamma reference voltage pairs, a first output voltage, a second output voltage, a third output voltage, and a fourth output voltage corresponding to each of the gamma reference voltage pairs. Further, the control circuit is configured to perform driving and displaying with the first output voltage in a first image frame, with the second output voltage in a second image frame, with the third output voltage in a third image frame, and with the fourth output voltage in a fourth image frame.

Abstract: The present disclosure provides a power supply circuit and a display apparatus. The power supply circuit includes a power management integrated circuit. The power management integrated circuit includes a driving pin configured to transmit a drive signal. The power management integrated circuit includes a power transistor with a control terminal connected to the driving pin, a first terminal connected to a first power source, and a second terminal connected to a load. The power transistor is configured to supply a voltage to the load.

Abstract: An electromagnetic interference suppression circuit, a driving method thereof, and an electronic apparatus are provided. In the electromagnetic interference suppression circuit, a signal generating sub-circuit may generate a plurality of parallel target sequence signals, each with a period greater than a period threshold and a quantity of target sequence signals greater than a quantity threshold; and a frequency generating sub-circuit may output a frequency-jittered drive signal, for driving a switch mode power supply to operate, to the switch mode power supply under the control of the plurality of parallel target sequence signals.

Abstract: The present disclosure provides a power supply circuit and a display apparatus. The power supply circuit includes a power management integrated circuit. The power management integrated circuit includes a driving pin configured to transmit a drive signal. The power management integrated circuit includes a power transistor with a control terminal connected to the driving pin, a first terminal connected to a first power source, and a second terminal connected to a load. The power transistor is configured to supply a voltage to the load.

Abstract: A driving circuit, a control method thereof, a display panel, and a display device. The driving circuit comprises a logic board, a gate driving sub-circuit, and an interface control sub-circuit. The interface control sub-circuit is configured to detect a timing control signal outputted by the logic board to the gate driving sub-circuit via a signal transmission interface, and control the signal transmission interface of the logic board to stop outputting the timing control signal to the gate driving sub-circuit in response to detecting that the timing control signal does not satisfy a preset condition.

Abstract: An image adjustment method and device, an image display method and device, and a non-transitory storage medium are disclosed. The image adjustment method includes: acquiring a saliency value of at least one pixel in an initial image; and performing a first brightness adjustment on a corresponding pixel in the at least one pixel in the initial image based on Weber's law.

Abstract: A driving circuit, a control method thereof, a display panel, and a display device. The driving circuit comprises a logic board, a gate driving sub-circuit, and an interface control sub-circuit. The interface control sub-circuit is configured to detect a timing control signal outputted by the logic board to the gate driving sub-circuit via a signal transmission interface, and control the signal transmission interface of the logic board to stop outputting the timing control signal to the gate driving sub-circuit in response to detecting that the timing control signal does not satisfy a preset condition.