Patents by Inventor Xiaowen SI

Xiaowen SI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710747
    Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate; a first electrode located on the base substrate and including a pad portion, the pad portion including a first surface and a second surface, the second surface being closer to the base substrate than the first surface; a first insulation layer located on the first electrode and including a first via hole; a second insulation layer located on the first insulation layer and including a second via hole; and a second electrode located on the second insulation layer; the second electrode is electrically connected with the first electrode at the pad portion through the first via hole and the second via hole, and an orthographic projection of the pad portion on the base substrate falls within an orthographic projection of the second via hole on the base substrate.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: July 25, 2023
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Fang Yan, Dawei Shi, Lei Yao, Zifeng Wang, Wentao Wang, Lu Yang, Haifeng Xu, Xiaowen Si, Jinfeng Wang, Lei Yan, Jinjin Xue, Lin Hou
  • Patent number: 11448929
    Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a plurality of gate lines on a side of the base substrate; a plurality of data lines on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines; and a plurality of light shielding metal portions between the base substrate and each of the plurality of gate lines; respective one of the gate lines includes a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments are connected in series through the one of the light shielding metal portions.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: September 20, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Lei Yao, Dawei Shi, Wentao Wang, Lu Yang, Haifeng Xu, Lei Yan, Jinfeng Wang, Jinjin Xue, Fang Yan, Xiaowen Si, Lin Hou, Zhixuan Guo, Yuanbo Li, Xiaofang Li
  • Publication number: 20210343747
    Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate; a first electrode located on the base substrate and including a pad portion, the pad portion including a first surface and a second surface, the second surface being closer to the base substrate than the first surface; a first insulation layer located on the first electrode and including a first via hole; a second insulation layer located on the first insulation layer and including a second via hole; and a second electrode located on the second insulation layer; the second electrode is electrically connected with the first electrode at the pad portion through the first via hole and the second via hole, and an orthographic projection of the pad portion on the base substrate falls within an orthographic projection of the second via hole on the base substrate.
    Type: Application
    Filed: September 29, 2018
    Publication date: November 4, 2021
    Inventors: Fang YAN, Dawei SHI, Lei YAO, Zifeng WANG, Wentao WANG, Lu YANG, Haifeng XU, Xiaowen SI, Jinfeng WANG, Lei YAN, Jinjin XUE, Lin HOU
  • Publication number: 20210333608
    Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a plurality of gate lines on a side of the base substrate; a plurality of data lines on a side of the plurality of gate lines away from the base substrate and intersecting with the plurality of gate lines; and a plurality of light shielding metal portions between the base substrate and each of the plurality of gate lines; respective one of the gate lines includes a plurality of gate line sub-segments separated by the plurality of data lines, respectively, every two adjacent gate line sub-segments in the respective one of the gate lines correspond to one of the light shielding metal portions, and the every two adjacent gate line sub-segments are connected in series through the one of the light shielding metal portions.
    Type: Application
    Filed: May 16, 2019
    Publication date: October 28, 2021
    Inventors: Lei YAO, Dawei SHI, Wentao WANG, Lu YANG, Haifeng XU, Lei YAN, Jinfeng WANG, Jinjin XUE, Fang YAN, Xiaowen SI, Lin HOU, Zhixuan GUO, Yuanbo LI, Xiaofang LI
  • Patent number: 10872984
    Abstract: A thin-film transistor (TFT), an array substrate, a manufacturing method thereof and a display device are provided. The TFT includes an active layer, a gate electrode, a first source/drain electrode and a second source/drain electrode. The active layer includes a first channel region and a second channel region, a first source/drain area between the first channel region and the second channel region, and a second source/drain area opposite to the first source/drain area through the first channel region or the second channel region. The gate electrode includes a first gate electrode and a second gate electrode which are respectively overlapped with the first channel region and the second channel region. The first source/drain electrode and the second source/drain electrode are respectively electrically connected with the first source/drain area and the second source/drain area of the active layer.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: December 22, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jinjin Xue, Dawei Shi, Haifeng Xu, Lu Yang, Wentao Wang, Lei Yan, Lei Yao, Fang Yan, Xiaowen Si
  • Patent number: 10795228
    Abstract: The present disclosure provides an array substrate, a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and gate lines and data lines arranged on the base substrate to define a plurality of pixel regions, and a diffuse reflection layer arranged in the plurality of pixel regions, in which a surface of the diffuse reflection layer facing a light emitting side of the array substrate is uneven.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: October 6, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lei Yao, Dawei Shi, Wentao Wang, Lu Yang, Haifeng Xu, Lei Yan, Jinfeng Wang, Xiaowen Si, Fang Yan, Jinjin Xue, Lin Hou, Yuanbo Li, Zhixuan Guo, Xiaofang Li
  • Patent number: 10599278
    Abstract: A touch structure, an array substrate and a display device are provided. The touch structure includes touch electrodes and touch electrode lines including a first touch electrode line and a second touch electrode line connected with different touch electrodes. The first touch electrode line includes a first wire and a second wire which are mutually connected. The first wire is connected with the touch electrode, which is connected with the first touch electrode line, via a first through hole running through the insulation layer. The second wire is connected with the touch electrode, which is connected with the first touch electrode line, via a second through hole running through the insulation layer. At least a part of the second touch electrode line is between the second through hole and the first through hole in an arrangement direction of the touch electrode lines.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: March 24, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Haifeng Xu, Dawei Shi, Wentao Wang, Lu Yang, Jinfeng Wang, Xiaowen Si, Lei Yao, Lei Yan, Zifeng Wang, Liman Peng, Wenxiu Li, Lei Wang, Yaoda Hou, Xingyu Peng
  • Publication number: 20190244824
    Abstract: The present disclosure relates to an array substrate, a method for fabricating the same, a display panel, and a method for fabricating the same. The array substrate includes a substrate, an active layer on the substrate, a first insulating layer on the active layer, a gate electrode and a first electrode on the first insulating layer, wherein a projection of the first electrode on the substrate and a projection of the active layer on the substrate do not overlap, a third insulating layer on the first electrode, a projection of the third insulating layer on the substrate does not overlap with a projection of the active layer on the substrate, a second electrode on the third insulating layer, and a second insulating layer on the gate electrode and the second electrode.
    Type: Application
    Filed: October 9, 2018
    Publication date: August 8, 2019
    Inventors: Haifeng XU, Dawei SHI, Liman PENG, Wentao WANG, Lu YANG, Lei YAO, Jinfeng WANG, Lei YAN, Jinjin XUE, Lin HOU, Fang YAN, Xiaowen SI, Zhijin MAN, Yaoda HOU, Yi LI, Lizhen ZHAO, Lei WANG
  • Patent number: 10355097
    Abstract: The present disclosure provides a thin film transistor (TFT), an array substrate, a display panel and a display device. The TFT includes a gate electrode, a gate insulating layer, a source electrode, a drain electrode and an active layer arranged on a base substrate, wherein there is a plurality of overlapping regions separated from each other where a projection of the gate electrode on the base substrate and a projection of the active layer on the base substrate overlap each other.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: July 16, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lu Yang, Wentao Wang, Xiaowen Si, Haifeng Xu, Jinfeng Wang, Lei Yan, Lei Yao, Feng Li
  • Publication number: 20190165001
    Abstract: An array substrate, a method of manufacturing the same, and a display panel are provided, the array substrate includes a base substrate, and a pixel unit on the base substrate; and a reflective layer disposed on the base substrate and located in a portion of a region of the pixel unit, a surface of the reflective layer facing away from the base substrate includes a rugged structure.
    Type: Application
    Filed: June 19, 2018
    Publication date: May 30, 2019
    Inventors: Lei Yao, Dawei Shi, Wentao Wang, Lu Yang, Haifeng Xu, Lei Yan, Jinfeng Wang, Xiaowen Si, Fang Yan, Jinjin Xue, Lin Hou, Zhixuan Guo, Yuanbo Li, Xiaofang Li
  • Publication number: 20190146293
    Abstract: The present disclosure provides an array substrate which is divided into a plurality of pixel units. The array substrate includes a pixel electrode layer including a plurality of pixel electrodes; a data line layer including a plurality of data lines; and a metal electrode layer including a plurality of drain electrodes, each of the drain electrodes being electrically connected with one of the plurality of pixel electrodes, wherein the metal electrode layer and the data line layer are spaced apart from each other in the thickness direction of the array substrate. The present disclosure also provides a display panel and a manufacturing method of the array substrate.
    Type: Application
    Filed: August 23, 2018
    Publication date: May 16, 2019
    Inventors: Jinjin XUE, Dawei SHI, Haifeng XU, Lu YANG, Wentao WANG, Lei YAN, Lei YAO, Xiaowen SI, Fang YAN
  • Patent number: 10290659
    Abstract: The present disclosure relates to a method for manufacturing a display panel, a display panel and a display device. There is provided a method for manufacturing a display panel, comprising: forming a first metal layer on a substrate; forming a second metal layer on the first metal layer; oxidizing a portion of the second metal layer to form an oxide extending to a surface of the first metal layer; removing the oxide to expose the surface of the first metal layer; and forming a conductive layer on the exposed surface of the first metal layer.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: May 14, 2019
    Assignees: BOE Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd.
    Inventors: Haifeng Xu, Dawei Shi, Wentao Wang, Lu Yang, Zifeng Wang, Xiaowen Si
  • Publication number: 20190131318
    Abstract: A thin-film transistor (TFT), an array substrate, a manufacturing method thereof and a display device are provided. The TFT includes an active layer, a gate electrode, a first source/drain electrode and a second source/drain electrode. The active layer includes a first channel region and a second channel region, a first source/drain area between the first channel region and the second channel region, and a second source/drain area opposite to the first source/drain area through the first channel region or the second channel region. The gate electrode includes a first gate electrode and a second gate electrode which are respectively overlapped with the first channel region and the second channel region. The first source/drain electrode and the second source/drain electrode are respectively electrically connected with the first source/drain area and the second source/drain area of the active layer.
    Type: Application
    Filed: September 19, 2018
    Publication date: May 2, 2019
    Inventors: Jinjin XUE, Dawei SHI, Haifeng XU, Lu YANG, Wentao WANG, Lei YAN, Lei YAO, Fang YAN, Xiaowen SI
  • Publication number: 20190072829
    Abstract: The present disclosure provides an array substrate, a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and gate lines and data lines arranged on the base substrate to define a plurality of pixel regions, and a diffuse reflection layer arranged in the plurality of pixel regions, in which a surface of the diffuse reflection layer facing a light emitting side of the array substrate is uneven.
    Type: Application
    Filed: September 5, 2018
    Publication date: March 7, 2019
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lei YAO, Dawei SHI, Wentao WANG, Lu YANG, Haifeng XU, Lei YAN, Jinfeng WANG, Xiaowen SI, Fang YAN, Jinjin XUE, Lin HOU, Yuanbo LI, Zhixuan GUO, Xiaofang LI
  • Publication number: 20180292934
    Abstract: A touch structure, an array substrate and a display device are provided. The touch structure includes touch electrodes and touch electrode lines including a first touch electrode line and a second touch electrode line connected with different touch electrodes. The first touch electrode line includes a first wire and a second wire which are mutually connected. The first wire is connected with the touch electrode, which is connected with the first touch electrode line, via a first through hole running through the insulation layer. The second wire is connected with the touch electrode, which is connected with the first touch electrode line, via a second through hole running through the insulation layer. At least a part of the second touch electrode line is between the second through hole and the first through hole in an arrangement direction of the touch electrode lines.
    Type: Application
    Filed: April 19, 2017
    Publication date: October 11, 2018
    Inventors: Haifeng XU, Dawei SHI, Wentao WANG, Lu YANG, Jinfeng WANG, Xiaowen SI, Lei YAO, Lei YAN, Zifeng WANG, Liman PENG, Wenxiu LI, Lei WANG, Yaoda HOU, Xingyu PENG
  • Publication number: 20180166473
    Abstract: The present disclosure relates to a method for manufacturing a display panel, a display panel and a display device. There is provided a method for manufacturing a display panel, comprising: forming a first metal layer on a substrate; forming a second metal layer on the first metal layer; oxidizing a portion of the second metal layer to form an oxide extending to a surface of the first metal layer; removing the oxide to expose the surface of the first metal layer; and forming a conductive layer on the exposed surface of the first metal layer.
    Type: Application
    Filed: May 10, 2016
    Publication date: June 14, 2018
    Inventors: Haifeng XU, Dawei SHI, Wentao WANG, Lu YANG, Zifeng WANG, Xiaowen SI
  • Publication number: 20180138281
    Abstract: The present disclosure provides a thin film transistor (TFT), an array substrate, a display panel and a display device. The TFT includes a gate electrode, a gate insulating layer, a source electrode, a drain electrode and an active layer arranged on a base substrate, wherein there is a plurality of overlapping regions separated from each other where a projection of the gate electrode on the base substrate and a projection of the active layer on the base substrate overlap each other.
    Type: Application
    Filed: September 20, 2017
    Publication date: May 17, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lu YANG, Wentao WANG, Xiaowen SI, Haifeng XU, Jinfeng WANG, Lei YAN, Lei YAO, Feng LI