Abstract: A shift register, gate drive circuit and display panel are provided. The shift register includes a latch unit, a NAND gate unit, a buffer unit and a switch unit. The latch unit, the NAND gate unit and the buffer unit are configured to produce a scanning driving signal and a scanning stopping signal. The latch unit is configured to control the switch unit to be turned on so as to output the scanning driving signal or the scanning stopping signal from the output terminal of the shift register, or control the switch unit to be turned off so as to enable the output terminal of the shift register to float.

Abstract: An array substrate and a display device are provided. In the array substrate, each of first shift register units and second shift register units is electrically connected to a respective scanning line. Scanning lines electrically connected to the first shift register units at the same stage or to the second shift register units at the same stage are in the same row. Clock signal input terminals of the first shift register units at the same stage or of the second shift register units at the same stage receive the same clock signal. Enable signal input terminals of the first shift register units at the first stage or of the second shift register units at the first stage receive the same enable signal.

Abstract: An array substrate, and a display panel and display device including the same are disclosed. An embodiment of the array substrate comprises a display region and a non-display region. The non-display region comprises: abase substrate; and a first metal layer, a second metal layer, and a third metal layer arranged in a direction perpendicular to the base substrate. A transistor and a metal line are arranged in the non-display region. A gate electrode of the transistor is located in the first metal layer. A source electrode and a drain electrode of the transistor are located in the second metal layer. The metal line is located in the third metal layer. The orthographic projection of the transistor onto the base substrate overlaps, at least partially, with the orthographic projection of the metal line onto the base substrate.

Abstract: A color filter plate, a display device including the color filter plate, and a color filter plate fabrication method are provided. The color filter plate comprises a substrate, a black matrix formed on the substrate, a color barrier layer formed on the black matrix, a protective layer formed on the black matrix and the color barrier layer, and a plurality of photo spacers formed on the protective layer. At least one hole is formed in the protective layer and between any two adjacent photo spacers, such that lower parts of adjacent photo spacers are no longer in contact with each other, and the adjacent photo spacers are fully separated from each other.

Abstract: A display panel and a display panel are provided. The display panel comprises an array substrate having an inner surface disposed with at least one first hole; a color film substrate arranged opposite to the array substrate; and a first photo spacer disposed between the array substrate and the color film substrate. The inner surface of the array substrate is arranged facing an inner surface of the color film substrate, and the first photo spacer is at least partially inserted into the at least one first hole disposed at the inner surface of the array substrate.

Abstract: Methods and apparatus for enabling effective decoding of rate-compatible punctured codes are presented herein. A puncturing component can derive one or more partial puncturing patterns and corresponding decoding matrices/graphs that represent punctured code from a parity check matrix/graph of a mother code and a puncturing pattern specified for the mother code. Further, a rowcombining component can combine rows of the parity check matrix/graph based on the derived one or more partial puncture patterns. Further, the rowcombining component can create at least one decoding matrix/graph to represent the punctured code based on the combined rows. In addition, a selection component can select a decoding matrix/graph from the created at least one decoding matrix/graph that does not contain a girth-4 cycle.

Abstract: Methods and apparatus for enabling effective decoding of rate-compatible punctured codes are presented herein. A puncturing component can derive one or more partial puncturing patterns and corresponding decoding matrices/graphs that represent punctured code from a parity check matrix/graph of a mother code and a puncturing pattern specified for the mother code. Further, a rowcombining component can combine rows of the parity check matrix/graph based on the derived one or more partial puncture patterns. Further, the rowcombining component can create at least one decoding matrix/graph to represent the punctured code based on the combined rows. In addition, a selection component can select a decoding matrix/graph from the created at least one decoding matrix/graph that does not contain a girth-4 cycle.