Patents by Inventor Xiaoya Ye

Xiaoya Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11094838
    Abstract: The present disclosure relates to a method for preparing nano-textured surface on single side of a silicon wafer, including the following steps: (1) superimposing two silicon wafers to obtain a first silicon wafer superimposition structure; the side on which the silicon wafers is superimposed is recorded as an attached surface, and the side exposed outside is recorded as an exposed surface; and (2) performing nano-textured surface etching on the first silicon wafer superimposition structure; and providing each silicon wafer with nano-textured surface on the exposed surface and a nano-textured surface etched strip on the edge of the attached surface. In the present disclosure, while the nano-textured surface etching is performed, the edge of the attached surface is etched with nano-textured surface by selecting a specific etching rate, which reduces the pulling force for detaching the wafers and reduces the fragmentation rate during the detaching process.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: August 17, 2021
    Assignees: CSI CELLS CO., LTD., CSI SOLAR POWER GROUP CO., LTD.
    Inventors: Shuai Zou, Xiaoya Ye, Fang Cao, Xusheng Wang, Guoqiang Xing
  • Publication number: 20190341509
    Abstract: The present disclosure relates to a method for preparing nano-textured surface on single side of a silicon wafer, including the following steps: (1) superimposing two silicon wafers to obtain a first silicon wafer superimposition structure; the side on which the silicon wafers is superimposed is recorded as an attached surface, and the side exposed outside is recorded as an exposed surface; and (2) performing nano-textured surface etching on the first silicon wafer superimposition structure; and providing each silicon wafer with nano-textured surface on the exposed surface and a nano-textured surface etched strip on the edge of the attached surface. In the present disclosure, while the nano-textured surface etching is performed, the edge of the attached surface is etched with nano-textured surface by selecting a specific etching rate, which reduces the pulling force for detaching the wafers and reduces the fragmentation rate during the detaching process.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 7, 2019
    Inventors: Shuai Zou, Xiaoya Ye, Fang Cao, Xusheng Wang, Guoqiang Xing