Patents by Inventor Xiaoyan Wang

Xiaoyan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7443700
    Abstract: A primary side sensing power control system and method for constant current control that utilizes a relationship that involves the measured reset-time from the previous cycle to determine the primary side peak current and off-time for the next cycle. This control mechanism does not need the knowledge of input voltage or magnetizing inductance. Therefore, it removes the sensitivities of input voltage and magnetizing inductance to the output current limit. Furthermore, it uses a time measurement instead of a voltage measurement for the current calculation which in many cases is easier to perform.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: October 28, 2008
    Assignee: iWatt Inc.
    Inventors: Liang Yan, Junjie Zheng, John Kesterson, Xiaoyan Wang, Hien Bui
  • Publication number: 20080112193
    Abstract: A primary side sensing power control system and method for constant current control that utilizes a relationship that involves the measured reset-time from the previous cycle to determine the primary side peak current and off-time for the next cycle. This control mechanism does not need the knowledge of input voltage or magnetizing inductance. Therefore, it removes the sensitivities of input voltage and magnetizing inductance to the output current limit. Furthermore, it uses a time measurement instead of a voltage measurement for the current calculation which in many cases is easier to perform.
    Type: Application
    Filed: May 7, 2007
    Publication date: May 15, 2008
    Applicant: iWatt Inc.
    Inventors: Liang Yan, Junjie Zheng, John Kesterson, Xiaoyan Wang, Hien Bui
  • Publication number: 20070299279
    Abstract: Isocyanates are produced by reacting an organic amine with phosgene in process which includes at least three stages. The first stage is carried out in a dynamic mixer. The second stage is carried out in at least one reactor. The third stage is carried out in at least one material separating apparatus. The pressure in the reactor of the second stage must be greater than or equal to the pressure in the dynamic mixer. The pressure in the third stage material separating apparatus must be lower than the pressure in the second stage reactor.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 27, 2007
    Inventors: Fritz Pohl, Ricardo Serra, Matthias Ehlers, Jeffrey S. Bolton, Gary B. Solak, Kirk J. Bourgeois, Gregory L. McCullough, Amber R. Hicks, Richard G. Hillman, James E. Sager, Xiaoyan Wang, Spotswood Miller, Ralf Ochel, Sara DeLucia
  • Patent number: 6597618
    Abstract: A circuit for controlling a read operation for a magnetic random access memory (MRAM) comprising an array of magnetic tunnel junctions (MTJ) having conducting row and column lines attached thereto. The circuitry comprises a current supply for providing a read current, and a row selector for selecting a row containing a junction to be read and applying the read current to that row with the respective row line. An unselected row switch switches to at least some of the row lines not connected to the MTJ to be read, and a voltage source applies, via the unselected row switch, a voltage to each of the unselected row lines that is substantially identical in level to the voltage on the selected row line. A column selector selects the column line connected to the array containing the MTJ to be read, and a voltage detector for detecting the voltage across the MTJ to be read via the selected column and row lines.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: July 22, 2003
    Assignee: Data Storage Institute
    Inventors: Yuankai Zheng, Yihong Wu, Xiaoyan Wang, Dan You
  • Publication number: 20030103404
    Abstract: A circuit for controlling a read operation for a magnetic random access memory (MRAM) comprising an array of magnetic tunnel junctions (MTJ) having conducting row and column lines attached thereto. The circuitry comprises a current supply for providing a read current, and a row selector for selecting a row containing a junction to be read and applying the read current to that row with the respective row line. An unselected row switch switches to at least some of the row lines not connected to the MTJ to be read, and a voltage source applies, via the unselected row switch, a voltage to each of the unselected row lines that is substantially identical in level to the voltage on the selected row line. A column selector selects the column line connected to the array containing the MTJ to be read, and a voltage detector for detecting the voltage across the MTJ to be read via the selected column and row lines.
    Type: Application
    Filed: June 27, 2002
    Publication date: June 5, 2003
    Inventors: Yuankai Zheng, Yihong Wu, Xiaoyan Wang, Dan You