Patents by Inventor Xiaoyong Liu
Xiaoyong Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240144965Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprises a first shield, a BiSb layer disposed over the first shield (S1), a free layer (FL) disposed over the BiSb layer, and a second shield (S2) disposed over the FL. The S1, the FL, and the S2 are disposed at a media facing surface (MFS). The BiSb layer is recessed from the MFS a first distance of about 5 nm to about 20 nm. The FL has a length greater than the first distance. A notch and/or an insulation layer is disposed adjacent to the BiSb layer at the MFS. Current may be configured to flow vertically through the S2 to the FL, and horizontally from the FL to the BiSb layer. Current may be configured to flow vertically through the S2 to the S1.Type: ApplicationFiled: July 31, 2023Publication date: May 2, 2024Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Rohan Babu NAGABHIRAVA, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Son T. LE, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
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Publication number: 20240144960Abstract: The present disclosure generally relates to a two dimensional magnetic recording (TDMR) spin-orbit torque (SOT) read head comprising bismuth antimony (BiSb) layers. The read head comprises a lower reader comprising a first SOT stack and an upper reader comprising a second SOT stack. The first SOT stack and the second SOT stack each individually comprise a BiSb layer recessed from a media facing surface (MFS) and a free layer exposed at the MFS. The BiSb layers of each SOT stack are recessed from the MFS a distance of about 5 nm to about 20 nm, the distance being less than a length of the free layers. In one embodiment, the lower reader and the upper reader share a current path. In another embodiment, the lower reader and the upper reader have separate current paths.Type: ApplicationFiled: July 26, 2023Publication date: May 2, 2024Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Rohan Babu NAGABHIRAVA, Xiaoyong LIU, Brian R. YORK, Son T. LE, Cherngye HWANG, Kuok San HO, Hisashi TAKANO
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Publication number: 20240135874Abstract: The present application discloses a display panel and a display device. The display panel comprises pixel circuits, collecting modules and feedback modules, and the pixel circuit comprises a driving module, a data writing module and a light-emitting module; wherein the data writing module is configured to transmit a voltage output by a data signal terminal to the driving module; the driving module and the light-emitting module are electrically connected between a first power supply terminal and a second power supply terminal, and the driving module is configured to generate a driving current according to the voltage from the data signal terminal and a voltage from the first power supply terminal to drive the light-emitting module to emit light; the collecting module is configured to collect at least one of a voltage actually received by the driving module and a voltage actually received by the driving module.Type: ApplicationFiled: January 12, 2023Publication date: April 25, 2024Applicant: Xiamen Tianma Display Technology Co., Ltd.Inventors: Qingyue ZHANG, Xiaoyong LIU, Zhida ZHU, Jingxiong ZHOU, Zhiqiang XIA
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Publication number: 20240116989Abstract: Processes for preparing compounds of Formula (1) and Formula (2) are described, wherein X, Y, Z, R1-R7, L and n are defined herein. Intermediates useful in the preparation of the compounds of Formula (1) and Formula (2) are also described.Type: ApplicationFiled: July 14, 2023Publication date: April 11, 2024Applicant: OnKure, Inc.Inventors: Anthony D. Piscopio, Xiaoyong Fu, Feng Shi, Huayan Liu, Zhifeng Li
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Publication number: 20240111536Abstract: The present disclosure provides a data processing apparatus and related products. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.Type: ApplicationFiled: December 7, 2023Publication date: April 4, 2024Applicant: CAMBRICON TECHNOLOGIES CORPORATION LIMITEDInventors: Shaoli Liu, Bingrui Wang, Xiaoyong ZHOU, Yimin ZHUANG, Huiying LAN, Jun LIANG, Hongbo ZENG
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Publication number: 20240093608Abstract: A tunnel automatic monitoring and measuring equipment and method based on fixed-point tour measurement are provided. The equipment includes a monitoring trolley that can move freely in the longitudinal direction of the tunnel, multiple automatic tracking and identification devices are set on the monitoring trolley, the automatic tracking and identification device is connected to the background processing system telecommunication; a monitoring points with reflective markings are arranged on the surface of the tunnel support structure, under the cooperation of the monitoring trolley and the automatic tracking and identification device, the reflective markings set on the tunnel support structure can be automatically measured at the fixed point to obtain the coordinate information of the relevant monitoring points; then, the deformation data of the support structure required in the construction process are extracted by coordinate information calculation.Type: ApplicationFiled: November 17, 2023Publication date: March 21, 2024Applicant: Guizhou Transportation Planning Survey & Design Academe Co.LTDInventors: Qiang HU, Bin DU, Yicheng WANG, Xiaoyong LIU, Deming GOU, Hong YANG, Junwei CHUN, Mingfang WU, Mingjiang DAI
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Patent number: 11908496Abstract: The present disclosure generally relate to spin-orbit torque (SOT) devices comprising a topological insulator (TI) modulation layer. The TI modulation layer comprises a plurality of bismuth or bismuth-rich composition modulation layers, a plurality of TI lamellae layers comprising BiSb having a (012) crystal orientation, and a plurality of texturing layers. The TI lamellae layers comprise dopants or clusters of atoms, the clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material. The clusters of atoms are configured to have a grain boundary glass forming temperature of less than about 400° C. Doping the TI lamellae layers comprising BiSb having a (012) crystal orientation with clusters of atoms comprising a carbide, a nitride, an oxide, or a composite ceramic material enable the SOT MTJ device to operate at higher temperatures while inhibiting migration of Sb from the BiSb of the TI lamellae layers.Type: GrantFiled: December 16, 2022Date of Patent: February 20, 2024Assignee: Western Digital Technologies, Inc.Inventors: Quang Le, Brian R. York, Cherngye Hwang, Susumu Okamura, Xiaoyong Liu, Kuok San Ho, Hisashi Takano
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Publication number: 20240032437Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprises a nonmagnetic buffer layer, a nonmagnetic interlayer, a ferromagnetic layer, and a nonmagnetic barrier layer. One or more of the barrier layer, interlayer, and buffer layer comprise a polycrystalline non-Heusler alloy material, or a Heusler alloy and a material selected from the group consisting of: Cu, Ag, Ge, Mn, Ni, Co, Mo, W, Sn, B, and In. The Heusler alloy is a full Heusler alloy comprising X2YZ or a half Heusler alloy comprising XYZ, where X is one of: Mn, Fe, Co, Ni, Cu, Ru, Rh, Pd, Ag, Ir, Pt, and Au, Y is one of: Ti, V, Cr, Mn, Fe, Co, Ni, Zn, Y, Zr, Nb, Mo, Hf, and W, and Z is one of: B, Al, Si, Ga, Ge, As, In, Sn, Sb, and Bi.Type: ApplicationFiled: May 15, 2023Publication date: January 25, 2024Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Susumu OKAMURA, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
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Patent number: 11882361Abstract: Aspects of the present disclosure generally relate to optical devices and related methods that facilitate tilt in camera systems, such as tilt of a lens. In one example, an optical device includes a lens, an image sensor disposed below the lens, a plurality of magnets disposed about the lens, and a plurality of: (1) vertical coil structures coiled in one or more vertical planes and (2) horizontal coil structures coiled in one or more horizontal planes. When power is applied, the coil structures can generate magnetic fields that, in the presence of the magnets, cause relative movement of the coil structures and associated structures. The plurality of vertical coil structures are configured to horizontally move the lens. The plurality of horizontal coil structures are configured to tilt the lens when differing electrical power is applied to at least two of the plurality of horizontal coil structures.Type: GrantFiled: November 19, 2021Date of Patent: January 23, 2024Assignee: Western Digital Technologies, Inc.Inventors: Quang Le, Rajeev Nagabhirava, Kuok San Ho, Zhigang Bai, Zhanjie Li, Xiaoyong Liu, Daniele Mauri
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Patent number: 11875827Abstract: The present disclosure generally relate to spin-orbit torque (SOT) devices. The SOT devices each comprise a non-magnetic layer, a free layer disposed in contact with the non-magnetic layer, and a bismuth antimony (BiSb) layer disposed over the free layer. The non-magnetic layer has a thickness of about 0.5 nm to about 2 nm. The BiSb layer has a thickness of about 5 nm to about 10 nm. The BiSb layer and the free layer have collective thickness between about 5 nm to about 20 nm. By reducing the thickness of the non-magnetic layer and BiSb layer, a read gap of each SOT device is reduced while enabling large inverse spin Hall angles and high signal-to-noise ratios.Type: GrantFiled: March 25, 2022Date of Patent: January 16, 2024Assignee: Western Digital Technologies, Inc.Inventors: Quang Le, Brian R. York, Xiaoyong Liu, Son T. Le, Cherngye Hwang, Michael A. Gribelyuk, Xiaoyu Xu, Kuok San Ho, Hisashi Takano, Julian Sasaki, Huy H. Ho, Khang H. D. Nguyen, Nam Hai Pham
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Publication number: 20240006109Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.Type: ApplicationFiled: June 30, 2022Publication date: January 4, 2024Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
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Publication number: 20240005973Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprise one or more GexNiFe layers, where at least one GexNiFe layer is disposed in contact with the BiSb layer. The GexNiFe layer has a thickness less than or equal to about 15 ? when used as an interlayer on top of the BiSb layer or less than or equal to 40 ? when used as a buffer layer underneath the BiSb. When the BiSb layer is doped with a dopant comprising a gas, a metal, a non-metal, or a ceramic material, the GexNiFe layer promotes the BiSb layer to have a (012) orientation. When the BiSb layer is undoped, the GexNiFe layer promotes the BiSb layer to have a (001) orientation. Utilizing the GexNiFe layer allows the crystal orientation of the BiSb layer to be selected.Type: ApplicationFiled: June 30, 2022Publication date: January 4, 2024Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Susumu OKAMURA, Kuok San HO, Hisashi TAKANO, Randy G. SIMMONS
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Publication number: 20230419990Abstract: The present disclosure generally relates to a bismuth antimony (BiSb) based STO (spin torque oscillator) sensor. The STO sensor comprises a SOT device and a magnetic tunnel junction (MTJ) structure. By utilizing a BiSb layer within the SOT device, a larger spin Hall angle (SHA) can be achieved, thereby improving the efficiency and reliability of the STO sensor.Type: ApplicationFiled: September 11, 2023Publication date: December 28, 2023Applicant: Western Digital Technologies, Inc.Inventors: Xiaoyong LIU, Zhanjie LI, Quang LE, Brian R. YORK, Cherngye HWANG, Kuok San HO, Hisashi TAKANO
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Publication number: 20230386721Abstract: The present disclosure generally relate to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a buffer layer, a bismuth antimony (BiSb) layer having a (012) orientation disposed on the buffer layer, and an interlayer disposed on the BiSb layer. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer each comprise at least one of a covalently bonded amorphous material, a tetragonal (001) material, a tetragonal (110) material, a body-centered cubic (bcc) (100) material, a face-centered cubic (fcc) (100) material, a textured bcc (100) material, a textured fcc (100) material, a textured (100) material, or an amorphous metallic material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the BiSb layer and enhance uniformity of the BiSb layer while further promoting the (012) orientation of the BiSb layer.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Susumu OKAMURA, Michael A. GRIBELYUK, Xiaoyong LIU, Kuok San HO, Hisashi TAKANO
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Patent number: 11783853Abstract: The present disclosure generally relates to a bismuth antimony (BiSb) based STO (spin torque oscillator) sensor. The STO sensor comprises a SOT device and a magnetic tunnel junction (MTJ) structure. By utilizing a BiSb layer within the SOT device, a larger spin Hall angle (SHA) can be achieved, thereby improving the efficiency and reliability of the STO sensor.Type: GrantFiled: May 31, 2022Date of Patent: October 10, 2023Assignee: Western Digital Technologies, Inc.Inventors: Xiaoyong Liu, Zhanjie Li, Quang Le, Brian R. York, Cherngye Hwang, Kuok San Ho, Hisashi Takano
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Patent number: 11776567Abstract: The present disclosure generally relates to spin-orbital torque (SOT) differential reader designs. The SOT differential reader is a multi-terminal device comprising a first seed layer, a first spin hall effect (SHE) layer, a first interlayer, a first free layer, a gap layer, a second seed layer, a second SHE layer, a second free layer, and a second interlayer. The gap layer is disposed between the first SHE layer and the second SHE layer. The materials and dimensions used for the first and second seed layers, the first and second interlayers, and the first and second SHE layers affect the resulting spin hall voltage converted from spin current injected from the first free layer and the second free layer, as well as the ability to tune the first and second SHE layers. Moreover, the SOT differential reader improves reader resolution without decreasing the shield-to-shield spacing (i.e., read-gap).Type: GrantFiled: August 5, 2021Date of Patent: October 3, 2023Assignee: Western Digital Technologies, Inc.Inventors: Cherngye Hwang, Xiaoyong Liu, Quang Le, Kuok San Ho, Hisashi Takano, Brian R. York
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Patent number: 11776565Abstract: The present disclosure generally relates to a tape head of a tape drive, and methods of forming thereof. In one embodiment, a tape head for magnetic storage devices comprises a trailing shield, a leading shield, a first write pole coupled to the trailing shield, a second write pole coupled to the leading shield, and side shields spaced from the first write pole and the second write pole by a thin insulation layer. The side shields are further disposed between the trailing shield and the leading shield. In another embodiment, a tape head for magnetic storage devices comprises a main pole disposed between a trailing shield and a leading shield and a side shield disposed adjacent to the main pole. The side shield is further disposed between the trailing shield and the leading shield and spaced from the main pole by a thin insulation layer.Type: GrantFiled: January 12, 2022Date of Patent: October 3, 2023Assignee: Western Digital Technologies, Inc.Inventors: Quang Le, Hongquan Jiang, Cherngye Hwang, David J. Seagle, Xiaoyong Liu
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Publication number: 20230306993Abstract: The present disclosure generally relate to spin-orbit torque (SOT) devices. The SOT devices each comprise a non-magnetic layer, a free layer disposed in contact with the non-magnetic layer, and a bismuth antimony (BiSb) layer disposed over the free layer. The non-magnetic layer has a thickness of about 0.5 nm to about 2 nm. The BiSb layer has a thickness of about 5 nm to about 10 nm. The BiSb layer and the free layer have collective thickness between about 5 nm to about 20 nm. By reducing the thickness of the non-magnetic layer and BiSb layer, a read gap of each SOT device is reduced while enabling large inverse spin Hall angles and high signal-to-noise ratios.Type: ApplicationFiled: March 25, 2022Publication date: September 28, 2023Inventors: Quang LE, Brian R. YORK, Xiaoyong LIU, Son T. LE, Cherngye HWANG, Michael A. GRIBELYUK, Xiaoyu XU, Kuok San HO, Hisashi TAKANO, Julian SASAKI, Huy H. HO, Khang H. D. NGUYEN, Nam Hai PHAM
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Patent number: 11763973Abstract: The present disclosure generally relate to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a buffer layer, a bismuth antimony (BiSb) layer having a (012) orientation disposed on the buffer layer, and an interlayer disposed on the BiSb layer. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer each comprise at least one of a covalently bonded amorphous material, a tetragonal (001) material, a tetragonal (110) material, a body-centered cubic (bcc) (100) material, a face-centered cubic (fcc) (100) material, a textured bcc (100) material, a textured fcc (100) material, a textured (100) material, or an amorphous metallic material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the BiSb layer and enhance uniformity of the BiSb layer while further promoting the (012) orientation of the BiSb layer.Type: GrantFiled: August 13, 2021Date of Patent: September 19, 2023Assignee: Western Digital Technologies, Inc.Inventors: Quang Le, Brian R. York, Cherngye Hwang, Susumu Okamura, Michael Gribelyuk, Xiaoyong Liu, Kuok San Ho, Hisashi Takano
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Publication number: 20230223043Abstract: The present disclosure generally relates to a tape head of a tape drive, and methods of forming thereof. In one embodiment, a tape head for magnetic storage devices comprises a trailing shield, a leading shield, a first write pole coupled to the trailing shield, a second write pole coupled to the leading shield, and side shields spaced from the first write pole and the second write pole by a thin insulation layer. The side shields are further disposed between the trailing shield and the leading shield. In another embodiment, a tape head for magnetic storage devices comprises a main pole disposed between a trailing shield and a leading shield and a side shield disposed adjacent to the main pole. The side shield is further disposed between the trailing shield and the leading shield and spaced from the main pole by a thin insulation layer.Type: ApplicationFiled: January 12, 2022Publication date: July 13, 2023Applicant: Western Digital Technologies, Inc.Inventors: Quang LE, Hongquan JIANG, Cherngye HWANG, David J. SEAGLE, Xiaoyong LIU