Abstract: Aspects of the disclosure provide a method and an apparatus including processing circuitry for video decoding. The processing circuitry can decode coding information for a plurality of blocks from a coded video bitstream. The coding information can indicate a high-level control flag for the plurality of blocks. The high-level control flag can indicate whether a plurality of coding tools is disabled for at least one of the plurality of blocks where at least one of the plurality of blocks includes a current block. The processing circuitry can determine whether the plurality of coding tools is disabled for the at least one of the plurality of blocks based on the high-level control flag. The processing circuitry can reconstruct the current block without the plurality of coding tools based on the plurality of coding tools being determined as disabled.

Abstract: Aspects of the disclosure provide methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes a processor that is configured to decode prediction information of a current block in a current coding tree unit (CTU) from a coded video bitstream. The prediction information is indicative of an intra block copy mode. The processor is configured to determine a search range for the intra block copy mode based on a size of the current CTU, and determine a block vector that points to a reference block in a same picture as the current block and within the determined search range, the reference block having reconstructed samples buffered in a reference sample memory. Further, the processor is configured to reconstruct at least a sample of the current block based on the reconstructed samples of the reference block that are retrieved from the reference sample memory.

Abstract: This disclosure relates generally to video coding and particularly to video file encapsulation and parameter signaling. For example, a method is disclosed for processing video data which may include receiving a bitstream comprising at least one video sample, the at least one video sample comprising a current video sample and a previous video sample, wherein each video sample comprises at least one video frame, and wherein each video sample is associated with a serving SPS for decoding the each of the at least one video sample; determining the serving SPS for the current video sample as being one of: a previous SPS already parsed from the bitstream and used for decoding the previous video sample; a current SPS encapsulated in the current video sample; and an SPS in a list of candidate SPSs; and decoding the current video sample based on the serving SPS for the current video sample.

Abstract: This disclosure relates generally to coding and decoding of 3-dimensional (3D) mesh and specifically to fast and efficient packing of parts of a 3D mesh into a map in a 2-dimensional (2D) space. In one example, a 3D mesh frame is decomposed into charts. The charts are iteratively projected and packed into a 2D map to achieve improved compactness by using an image filtering technology. The image filtering technology may involve perform efficient convolution and correlation processing using fast Fourier transform.

Abstract: An apparatus for image/video encoding includes processing circuitry. The processing circuitry performs, based on one or more input images, an online training of a neural image compression (NIC) framework. The NIC framework is an end-to-end framework that comprises one or more first neural networks in an encoding portion and one or more second neural networks in a decoding portion. The online training determines an update to one or more tunable parameters in the one or more first neural networks with the one or more second neural networks having fixed parameters. The processing circuitry updates the one or more tunable parameters in the one or more first neural networks according to the update, and encodes, by the encoding portion of the NIC framework with the one or more tunable parameters in the one or more first neural networks being updated, the one or more input images into a bitstream.

Abstract: Method, apparatus, and system for parallel dynamic mesh alignment are provided. The process may include determining that a temporal alignment is present between one or more frames in a received input mesh including a plurality of polygons that describe a surface of a volumetric object, then, determining an intra-frame alignment scheme to spatially align charts within a frame. The process may also include applying the intra-frame alignment scheme to one or more corresponding charts in the one or more frames for inter-frame alignment; and processing the one or more frames in parallel based on the intra-frame alignment scheme and inter-frame alignment.

Abstract: Method, apparatus, and system for generating temporally correlated UV atlases are provided. The process may include generating plurality of consistent UV charts based on partition information associated with one or more previous frames; removing one or more non-manifold vertices from the plurality of consistent UV charts based on assigning one or more incident faces associated with the one or more non-manifold vertices to corresponding UV charts; merging more than one of the plurality of consistent UV charts based on a similarity between the plurality of consistent UV charts and one or more reference charts associated with the one or more previous frames; and generating temporally correlated UV atlases for the current frame based on aligning the plurality of consistent UV charts with the one or more reference charts associated with the one or more previous frames.

Abstract: Method, apparatus, and system for geometry filtering for mesh compression are provided. The process may include receiving a coded bitstream associated with a mesh, wherein the coded bitstream comprises boundary information associated with the mesh, and determining one or more boundary vertices associated with the mesh based on the boundary information. The process may also include generating a filtered geometry map associated with the mesh based on the one or more boundary vertices associated with the mesh and one or more filtering parameters in a filtering algorithm; and compressing the filtered geometry map using a video codec into a plurality of single channel or multiple channel images.

Abstract: A method performed by at least one processor in a decoder includes receiving a coded video bitstream that includes a compressed two dimensional (2D) mesh corresponding to a surface of three dimensional (3D) volumetric object. The method includes predicting a sampled 2D coordinate from at least one previously coded sampled 2D coordinate included in the compressed mesh. The method includes deriving a prediction residual associated with the sampled 2D coordinate. The method further includes reconstructing a 2D coordinate corresponding to a boundary vertex based on the predicted sampled 2D coordinate and the derived prediction residual.

Abstract: This disclosure relates to methods and systems for for encoding or decoding a 3D mesh with predictive coding of boundary geometry information. The example decoding method includes receiving a coded bitstream comprising a geometry patch for a three-dimension mesh; extracting, from the coded bitstream, a reconstructed geometry image for the geometry patch comprising a set of points corresponding to a set of geometry coordinates for a boundary vertex in the three-dimension mesh; deriving based on the set of the geometry coordinates, a 3D geometry coordinate for the boundary vertex; obtaining a prediction residue for the boundary vertex; and reconstructing, by the device, geometry information of the boundary vertex based on the derived 3D geometry coordinate and the prediction residue.

Abstract: A method of video encoding includes, prior to encoding a first tile of s plurality of tiles of a current picture, initializing a shared row buffer that is shared among multiple processor threads associated with the first tile. The method also includes encoding a first unit of a plurality of units in a first row of the first tile by a first processor thread and using a corresponding first HMVP buffer. The method also includes, when all of the plurality of blocks in the first unit have been encoded, copying contents of the first HMVP buffer into the shared row buffer, copying contents of the shared row buffer into a second HMVP buffer, starting encoding of a unit in a second row of the plurality of rows by the second processor thread using the second HMVP buffer, and resetting the first HMVP buffer.

Abstract: In a method of video encoding, a block vector of a current block of a current picture that is to be coded in intra block copy (IBC) mode is determined. The block vector points to a reference block of the current block in the current picture. The current block is encoded based on the block vector. A first modulo operation is performed on an x component of the block vector and a second modulo operation is performed on a y component of the block vector. The second modulo operation is different from the first modulo operation.

Abstract: A pruning method of neural network based video coding of a current block of a picture of a video sequence is performed by at least one processor and includes categorizing parameters of a neural network into groups, setting a first index to indicate that a first group of the groups is to be pruned, and a second index to indicate that a second group of the groups is not to be pruned, and transmitting, to a decoder, the set first index and the set second index. Based on the transmitted first index and the transmitted second index, the current block is processed using the parameters of which the first group of the groups is pruned.

Abstract: A method includes receiving, at a decoder, video data and a supplemental enhancement information (SEI) message corresponding to the video data, the SEI message including information indicating whether the received video data uses neural network based tools, and performing, at the decoder, post-processing of the received video data based on the information included in the SEI message.

Abstract: An apparatus for video decoding includes processing circuitry. The processing circuitry decodes prediction information of a current block from a coded video bitstream. The prediction information is indicative of an intra block copy mode, the current block is one of a plurality of coding blocks in a coding tree block (CTB) with a right to left coding order being allowed within the current CTB. The processing circuitry determines a block vector that points to a reference block in a same picture as the current block. Then, the processing circuitry ensures the reference block being buffered in a reference sample memory based on at least a determination that a sample that is right of a leftmost sample of the reference block is buffered in the reference sample memory. Further, the processing circuitry reconstructs at least a sample of the current block based on reconstructed samples of the reference block.

Abstract: Aspects of the disclosure provide a method and an apparatus including processing circuitry for video decoding. The processing circuitry decodes prediction information of a current block in a current picture from a coded video bitstream. The prediction information indicates a prediction mode for the current block being an inter prediction mode or an intra block copy (IBC) mode. The processing circuitry selects a base vector from a candidate list including a block vector candidate used in the IBC mode and determines an offset vector based on offset information that includes directions and sizes for constructing offset vectors. The processing circuitry determines a vector of the current block based on the base vector and the offset vector. The vector is a block vector when the prediction mode is the IBC mode and the vector is a motion vector when the prediction mode is the inter prediction mode.

Abstract: Aspects of the disclosure provide methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes receiving circuitry and processing circuitry. The processing circuitry decodes prediction information of a current block within a current picture from a coded video bitstream. The prediction information is indicative of usage information of an inter prediction mode that is not compatible with using the current picture as a reference picture for the current block. Then, the processing circuitry determines whether the coded video bitstream is valid based on a conformance check of the usage information to the reference picture for the current block.

Abstract: Aspects of the disclosure provide a method and an apparatus for video coding. The apparatus includes processing circuitry. The processing circuitry can determine a subblock-based merge mode used to code a current block in a current picture. The processing circuitry can partition the current block into a plurality of subblocks based on the subblock-based merge mode. The processing circuitry can determine that decoder-side motion vector refinement (DMVR) is to be applied to one of the plurality of subblocks in the current block based on a mode type of the subblock-based merge mode. The processing circuitry can encode information indicating the subblock-based merge mode in a bitstream.

Abstract: This disclosure relates to methods and systems for for encoding or decoding a 3D mesh with constrained geometry dynamic range. The example decoding method includes receiving a coded bitstream comprising a geometry patch for a three-dimension mesh; extracting, from the coded bitstream, a first syntax element indicating whether the geometry patch is partitioned, wherein the geometry patch comprises one or more partitions; and for a respective partition in the geometry patch, obtaining a dynamic range of pixel values for points in the respective partition that correspond to vertices in the three-dimension mesh, wherein the dynamic range enables the geometry patch to be coded within a predetermined bit depth.

Abstract: Aspects of the disclosure provide a method and an apparatus including processing circuitry for video decoding. The processing circuitry receives, from a coded video bitstream, coding information for a current picture. At least one flag in the coding information indicates one or more allowable coding types for sub-partitions in the current picture. The one or more allowable coding types include at least one of intra coding and inter coding for the sub-partitions. The processing circuitry determines, based on the at least one flag, whether to decode intra syntax elements used only for coding intra sub-partitions and whether to decode inter syntax elements used only for coding inter sub-partitions. The processing circuitry decodes the intra syntax elements in the coding information when the intra syntax elements are determined to be decoded and decodes the inter syntax elements in the coding information when the inter syntax elements are determined to be decoded.