Patents by Inventor Xiayang Zhao

Xiayang Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250086882
    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., GPU. The apparatus may obtain an indication of a set of primitives for a draw call operation. The apparatus may also identify a subset of primitives in the set of primitives, each of the subset of primitives including a primitive portion that is outside of a viewing frustum for the draw call operation, and the primitive portion corresponding to less than all of each of the subset of primitives. Further, the apparatus may calculate an area of each of the subset of primitives including the primitive portion that is outside of the viewing frustum. The apparatus may also perform, or refrain from performing, a clipping operation for each of the subset of primitives based on the area of each of the subset of primitives being less than or greater than an area threshold.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Inventors: Tao WANG, Xiayang ZHAO, Huaibing ZHU, Ruohong ZHOU, Jian LIANG, Junmei SHAO, Qinyu CHEN
  • Publication number: 20240265486
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for backface culling for guard band clipping primitives. A graphics processor may identify at least one backface primitive in a set of primitives that extends beyond at least one guard band, where the at least one backface primitive is identified based on a set of fixed point coordinates. The graphics processor may cull the at least one backface primitive. The graphics processor may transmit an indication of the culled at least one backface primitive.
    Type: Application
    Filed: February 2, 2023
    Publication date: August 8, 2024
    Inventors: Tao WANG, Ashokanand NEELAMBARAN, Jian LIANG, Xiayang ZHAO, Lingjun CHEN
  • Patent number: 9659407
    Abstract: A graphics processing unit (GPU) is provided to preemptively flush one or more bins. The GPU generates bin data of a display area according to an association of primitive data with the bins that correspond to the display area. Upon detecting an adaptive condition, a signal is generated to indicate that one or more bins of a first frame are to be flushed in a first order before the first frame is fully binned. The signal interrupts bin flush of a second frame in a second order in order to flush the one or more bins of the first frame in the first order. After the one or more bins of the first frame are flushed, the bin flush of the second frame is resumed in the second order.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: May 23, 2017
    Assignee: MediaTek Singapore, Pte. Lte.
    Inventors: Chien-Ping Lu, Qun-Feng Liao, Hsilin Huang, Xiayang Zhao
  • Publication number: 20160322031
    Abstract: Embodiments of techniques of cost-effective in-bin primitive pre-ordering in a graphics processing unit (GPU) are described. In one example implementation, a control circuit of the GPU may receive data related to a plurality of primitives. The control circuit may store identifications of a set of visible primitives among the plurality of primitives in a first buffer of the GPU for a plurality of pixels of the bin. Each visible primitive may correspond to a respective pixel of the bin. At each pixel of the bin, a depth of the visible primitive relative to an image plane may be less than a depth of each of one or more other primitives of the plurality of primitives relative to the image plane. The control circuit may provide the identifications of the visible primitives to a rendering unit in batches for rendering of the pixels of the bin.
    Type: Application
    Filed: April 28, 2015
    Publication date: November 3, 2016
    Inventors: Qun-Feng Liao, Xiayang Zhao
  • Publication number: 20160217550
    Abstract: A graphics processing unit (GPU) is provided to preemptively flush one or more bins. The GPU generates bin data of a display area according to an association of primitive data with the bins that correspond to the display area. Upon detecting an adaptive condition, a signal is generated to indicate that one or more bins of a first frame are to be flushed in a first order before the first frame is fully binned. The signal interrupts bin flush of a second frame in a second order in order to flush the one or more bins of the first frame in the first order. After the one or more bins of the first frame are flushed, the bin flush of the second frame is resumed in the second order.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 28, 2016
    Inventors: Chien-Ping LU, Qun-Feng LIAO, Hsilin HUANG, Xiayang ZHAO
  • Publication number: 20160035128
    Abstract: A graphics processing system includes a first storage device, a second storage device, a vertex position shader, a vertex classification module, and a vertex attribute shader. The vertex position shader performs vertex position shading for vertices of primitives in a frame at a binning process. The vertex classification module classifies the vertices of the primitives in the frame into first-type vertices and second-type vertices according to vertex distribution. The vertex attribute shader performs deferred vertex attribute shading for the first-type vertices and the second-type vertices at a rendering process following the binning process, wherein vertex attribute shading results of at least a portion of the first-type vertices classified by the vertex classification module are stored in the second storage device, and vertex attribute shading results of at least a portion of the second-type vertices classified by the vertex classification module are stored in the first storage device.
    Type: Application
    Filed: April 17, 2015
    Publication date: February 4, 2016
    Inventors: Xiayang Zhao, Qun-Feng Liao, Hsilin Huang, Pei-Kuei Tsung, Sung-Fang Tsai