Abstract: A memory swapping method and apparatus are provided. The method includes: selecting n to-be-swapped-out pages; compressing the n to-be-swapped-out pages into n compressed blocks, and buffering the n compressed blocks in a compressed data buffer area; organizing at least one of the n compressed blocks into m to-be-written units; and writing the m to-be-written units into a swap area of a non-volatile storage device in a maximum of m batches, where at least one of the m to-be-written units is stored in a segment of continuous space in the swap area. The method reduces a quantity of write times during memory swapping, thereby prolonging a service life of the non-volatile storage device.

Abstract: Data writing methods and computing devices are provided. An example data writing method is applied to a computer system, and the computer system includes a file system and a flash memory-based storage system. The example data writing method includes obtaining a target logical address, where the target logical address is an address allocated from a first logical block to target data to be written into the flash memory-based storage system, the first logical block is one of multiple logical blocks in the file system, and the flash memory-based storage system includes multiple physical blocks. It is determined that the target logical address belongs to the first logical block. The target data is written into a first physical block based on a correspondence between the first logical block and the first physical block, where the first physical block is one of the multiple physical blocks.

Abstract: This application provides a system architecture switching method and apparatus. The method includes: when a system architecture needs to be switched, transforming a first system architecture into a second system architecture, where the first system architecture represents a system architecture before switching; and providing a service for a user by using the second system architecture. Dynamic switching of a system architecture is implemented by using a transformable system architecture, so that switching of different architectures can be implemented by using only one system architecture. Therefore, only code for implementing the system architecture is required, and code overheads can be reduced in comparison with a conventional technology.

Abstract: A memory swapping method and apparatus are provided. The method includes: selecting n to-be-swapped-out pages; compressing the n to-be-swapped-out pages into n compressed blocks, and buffering the n compressed blocks in a compressed data buffer area; organizing at least one of the n compressed blocks into m to-be-written units; and writing the m to-be-written units into a swap area of a non-volatile storage device in a maximum of m batches, where at least one to-be-written unit is stored in a segment of continuous space in the swap area. The method reduces a quantity of write times during memory swapping, thereby prolonging a service life of the non-volatile storage device.

Abstract: A data processing method and apparatus are provided. The data processing method is: receiving a write request, where the write request is for requesting to write, to an external memory, first data in a first storage area in an internal memory; writing the first data to a second storage area in the internal memory, where the second storage area is a storage area, in the internal memory, that is reallocated to the first data, and the second storage area is different from the first storage area; sending a response message after the first data is written to the second storage area, where the response message indicates that processing of the write request is completed; and writing the first data in the second storage area to the external memory.

Abstract: An I/O request scheduling method includes storing received I/O requests into a plurality of queues, where each queue corresponds to at least one process group, each process group includes one or more processes, and a received I/O request is stored into a queue corresponding to a process group to which a process corresponding to the I/O request belongs, and dispatching the I/O requests in the plurality of queues to an I/O device, where a quantity of I/O requests from a high-priority queue is greater than a quantity of I/O requests from a low-priority queue during one dispatching procedure.

Abstract: An I/O request scheduling method includes storing received I/O requests into a plurality of queues, where each queue corresponds to at least one process group, each process group includes one or more processes, and a received I/O request is stored into a queue corresponding to a process group to which a process corresponding to the I/O request belongs, and dispatching the I/O requests in the plurality of queues to an I/O device, where a quantity of I/O requests from a high-priority queue is greater than a quantity of I/O requests from a low-priority queue during one dispatching procedure.

Abstract: Embodiments of the present disclosure provide a DRAM-based storage caching method for a smart terminal, and the method includes: capturing an IO delivered by an upper-layer application; determining, based on a configuration policy, whether the IO belongs to a pre-specified to-be-cached IO type; and when the IO belongs to the pre-specified to-be-cached IO type, performing a corresponding caching operation for the IO in a DRAM disk based on a read/write type of the IO and a preset caching policy, where the DRAM disk is a block device created by using a reserved part of DRAM space of an operating system.

Abstract: The present invention provides a data transmission method, device, and system, to perform DMA data transmission between an I/O device and multiple host devices. DMA memory addresses of the multiple hosts are mapped, to virtual addresses in a global virtual address space, a DMA memory address and a target host that correspond to the DMA virtual address are determined according to a correspondence among DMA virtual addresses, DMA memory addresses, and hosts; the DMA virtual address in the DMA packet is modified to the DMA memory address mapped to the DMA virtual address; and the modified DMA packet is sent to the target host. DMA data transmission between an I/O device and multiple hosts can be implemented, utilization of the I/O device is improved, and application scenarios of network transmission are expanded.