Patents by Inventor Xin-Cheng Shen

Xin-Cheng Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7093060
    Abstract: The present invention provides a method as well as an architecture for a host equipped with a CPU-level processing capability to access a Non-Volatile Random Access Memory (NVRAM) and at least a controller via a simple 3-wire/4-wire mechanism. The data stored in the NVRAM are shared with the controller and the host. More importantly, a multi-access mechanism further having a pragmatic bit determines the pragmatic bit for either the controller or the NVRAM. With the method of the present invention, computer system resources can be fully utilized, and thereby, peripheral devices can be easily added to the system in an inexpensive and highly efficient way.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: August 15, 2006
    Assignee: ICP Electronics Inc.
    Inventors: Chien-Hsing Liu, Xin-Cheng Shen, Zheng-Zian Li
  • Publication number: 20040128522
    Abstract: A software protection scheme for a peripheral add-on card mounted on a peripheral bus of a host system. According to the invention, a microcontroller reads a specific encrypted message from a non-volatile memory and decrypts it when a first reset signal of the peripheral bus is deasserted. After that, the microcontroller deasserts a second reset signal. When the second reset signal is deasserted, a microprocessor reads the specific decrypted message from the microcontroller. Then the microprocessor transmits the specific decrypted message via the peripheral bus to the host system for verification of the specific decrypted message. The host system will execute a protected program to start operations of the add-on card if the verification of the specific decrypted message succeeds.
    Type: Application
    Filed: May 2, 2003
    Publication date: July 1, 2004
    Inventors: Chien-Hsing Liu, Yung-Chih Chen, Xin-Cheng Shen
  • Publication number: 20040128431
    Abstract: The present invention provides a method as well as an architecture for a host equipped with a CPU-level processing capability to access a Non-Volatile Random Access Memory (NVRAM) and at least a controller via a simple 3-wire/4-wire mechanism. The data stored in the NVRAM are shared with the controller and the host. More importantly, a multi-access mechanism further having a pragmatic bit determines the pragmatic bit for either the controller or the NVRAM. With the method of the present invention, computer system resources can be fully utilized, and thereby, peripheral devices can be easily added to the system in an inexpensive and highly efficient way.
    Type: Application
    Filed: September 12, 2003
    Publication date: July 1, 2004
    Inventors: CHIEN-HSING LIU, XIN-CHENG SHEN, ZHENG-ZIAN LI