Patents by Inventor Xin Miao

Xin Miao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250115950
    Abstract: The present disclosure describes various improvements for programmable nuclease-based detection assays. Also provided are compositions, methods, kits, systems, and devices for practicing the same. Such improvements include improved reporter designs to facilitate the cleavage of a reporter immobilized on a substrate by an activated programmable nuclease. Improved reporter designs may comprise various lengths and structures of the reporter. The substrate can also comprise immobilized guide nucleic acids and/or programmable nucleases.
    Type: Application
    Filed: June 12, 2024
    Publication date: April 10, 2025
    Inventors: Sarah Jane SHAPIRO, Sonal JAIN, Deepika VERMA, James Paul BROUGHTON, Benjamin Andrew BLIZARD, Janice Sha CHEN, Matthew VEROSLOFF, Elizabeth M. HAWKINS, Nicholas John FANTIN, Rachel Jordan PATRON, Alexander HIRSCHI, Nazmiye Emel ALPAY, Lisa J. KRYGSMAN, Xin MIAO, Jesus CHING, Sara ANSALONI
  • Publication number: 20250107229
    Abstract: Device layouts for integrated circuit devices that include threshold voltage shift induced by placement of alternate work function metals adjacent active gates are disclosed. The device layouts include a single epitaxy for active regions in the device with common source/drain regions among the active region rows in the layouts. Metal gate sections above one or more rows of active regions may be replaced with metal of a different work function in inactive regions of the layout. The different work function metal in the inactive regions will induce threshold voltage shift in adjacent (neighboring) active transistors of the device layouts.
    Type: Application
    Filed: September 18, 2024
    Publication date: March 27, 2025
    Inventors: Xin Miao, Emre Alptekin
  • Publication number: 20250101498
    Abstract: Provided herein are compositions, systems, and methods comprising effector proteins and uses thereof. These effector proteins may be characterized as CRISPR-associated (Cas) proteins. Various compositions, systems, and methods of the present disclosure may leverage the activities of these effector proteins for the modification, detection, and engineering of nucleic acids.
    Type: Application
    Filed: April 23, 2024
    Publication date: March 27, 2025
    Inventors: William Douglass WRIGHT, Stepan TYMOSHENKO, David PAEZ-ESPINO, Ashley Dorothy AMADO, Janice Sha CHEN, James Paul BROUGHTON, Xin MIAO, Sara ANSALONI, Yining ZHANG, Sierra Hirose LEE, Ryan HONG
  • Publication number: 20250105134
    Abstract: Integrated circuit devices with buffer transistors or inverter transistors formed between topside BEOL (back end of line) metal layers are described. The buffer or inverter transistors include active regions and source/drains that can be formed in the spaces between topside metal layers. In certain instances, the transistors are formed in between metal layers furthest away from substrate. The transistors connect to routing either above or below the transistors to buffer and/or invert signals passing through the routing. For instance, the transistors may include active regions positioned between power and ground routings and connect to signal routing between the power and ground routings to boost and/or to invert the signal propagating along the signal routing. In various instances, the active regions of the transistors are formed by thin channel materials.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 27, 2025
    Inventors: Xin Miao, Saurabh P. Sinha
  • Patent number: 12230676
    Abstract: A nanosheet device includes a bottom dielectric isolation formed by a first portion of a high-k dielectric layer above a semiconductor substrate, a spacer material above the first portion of the high-k dielectric layer and a second portion of the high-k dielectric layer above the spacer material. A sequence of semiconductor channel layers are stacked perpendicularly to the semiconductor substrate above the bottom dielectric isolation and are separated by and vertically aligned with a metal gate stack. Source/drain regions extend laterally from opposite ends of the semiconductor channel layers with a bottom surface of the source/drain regions being in direct contact with the bottom dielectric isolation for electrically isolating the source/drain regions from the semiconductor substrate.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: February 18, 2025
    Assignee: International Business Machines Corporation
    Inventors: Xin Miao, Jingyun Zhang, Alexander Reznicek, Choonghyun Lee
  • Publication number: 20240419517
    Abstract: A first process remotely calls and executes, according to a first function readable and executable for a user-mode process, a second function in physical memory address space of a first system service process. The first function readable and executable for processes in user mode is used, so that the first process may remotely call, the second function stored in the physical memory address space of the first system service process.
    Type: Application
    Filed: October 12, 2022
    Publication date: December 19, 2024
    Inventors: Weizhou Wang, Xin Miao
  • Patent number: 12163863
    Abstract: A detection system for a suspension system of a maglev train, comprising a detection component and a controller. The detection component comprises: a driving unit, a first test coil unit and a second test coil unit. A first test coil group of the first test coil unit corresponds to a gap coil of a to-be-detected suspension sensor, and a second test coil group of the second test coil unit corresponds to a speed coil of the to-be-detected suspension sensor. The controller is communicatively connected with the driving unit and a suspension controller, the driving unit is configured to send a driving signal to at least one of the first test coil unit and the second test coil unit in response to a control command from the controller, and the controller is configured to acquire parameter information fed back by the suspension controller.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: December 10, 2024
    Assignee: CRRC QINGDAO SIFANG CO., LTD.
    Inventors: Donghua Wu, Xin Miao, Yanmin Li, Shouliang Jiang, Jian Chen, Jiyu Han
  • Publication number: 20240359180
    Abstract: The present disclosure provides various systems, diagnostic devices, and methods for nucleic acid analysis. The systems, devices, and methods allow for the analysis of nucleic acids, in a sample, via programmable nuclease-based assays. Provided are systems comprising an instrument and a cartridge allowing for point of care use. The systems, devices, and methods described herein can be configured for multiplexed detection of nucleic acids in a single sample.
    Type: Application
    Filed: December 15, 2023
    Publication date: October 31, 2024
    Inventors: Timothy James PATNO, Phillip You Fai LEE, Benjamin Andrew BLIZARD, Xin MIAO, Jacob LESINSKI, Ryan A. BROWN, Daniel Thomas DRZAL, Sarah Jane SHAPIRO, Joshua BAIK, Janice Sha CHEN, James Paul BROUGHTON, Clare Louise FASCHING, Jesus CHING, Sonal JAIN, Deepika VERMA, Matthew VEROSLOFF, Devin SPRATT, Nicholas John FANTIN
  • Publication number: 20240230475
    Abstract: A detection system for a suspension system of a maglev train, comprising a detection component and a controller. The detection component comprises: a driving unit, a first test coil unit and a second test coil unit. A first test coil group of the first test coil unit corresponds to a gap coil of a to-be-detected suspension sensor, and a second test coil group of the second test coil unit corresponds to a speed coil of the to-be-detected suspension sensor. The controller is communicatively connected with the driving unit and a suspension controller, the driving unit is configured to send a driving signal to at least one of the first test coil unit and the second test coil unit in response to a control command from the controller, and the controller is configured to acquire parameter information fed back by the suspension controller.
    Type: Application
    Filed: April 27, 2022
    Publication date: July 11, 2024
    Applicant: CRR QINGDAO SIFANG CO., LTD.
    Inventors: Donghua WU, Xin MIAO, Yanmin LI, Shouliang JIANG, Jian CHEN, Jiyu HAN
  • Publication number: 20240209421
    Abstract: The present disclosure provides single-buffer systems that enable efficient and rapid amplification and programmable nuclease enzyme mediated reactions. The single-buffer systems and reagent compositions therein may be used for assaying for a nucleic acid sequence from a sample.
    Type: Application
    Filed: June 13, 2023
    Publication date: June 27, 2024
    Inventors: Janice Sha CHEN, Carley Gelenter HENDRIKS, Clare Louise FASCHING, Xin MIAO, Nazmiye Emel ALPAY, James Paul BROUGHTON, Elizabeth M. HAWKINS, Matthew S. VEROSLOFF, Sophia HUBBELL, Sarah Jane SHAPIRO, Lior KREINDLER, Jesus CHING
  • Patent number: 11982589
    Abstract: A magnetic levitation test system and an electromagnet test method. A vehicle-mounted controller (1024), an electromagnet controller, and an electromagnet are subjected to joint test by means of the magnetic levitation test system integrated with a vehicle-mounted controller test bed (102), an electromagnet controller test bed (104), and an electromagnet test bed (106). The running condition of a train can be simulated, and the vehicle-mounted controller (1024), the electromagnet controller, and the electromagnet are subjected to joint test under the simulated running condition of the train. Therefore, the vehicle-mounted controller (1024), the electromagnet controller, and the electromagnet are subjected to function verification, thereby reducing the fault rate when the vehicle-mounted controller (1024), the electromagnet controller, and the electromagnet are used at the same time.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: May 14, 2024
    Assignee: CRRC QINGDAO SIFANG CO., LTD.
    Inventors: Fujie Jiang, Jian Chen, Yanmin Li, Xin Miao, Shouliang Jiang
  • Publication number: 20240105727
    Abstract: Various structures that implement topside metal routing and backside metal routing in combination with vertical transistors are disclosed. The various structures include cells that form inverter devices, NAND devices, and MUX (multiplexer) devices. The disclosed cells include two or four vertical transistors with various connections made to the transistors that include either connected gate logic for inverter and NAND devices or disconnected gate logic for MUX devices.
    Type: Application
    Filed: August 11, 2023
    Publication date: March 28, 2024
    Inventors: Xin Miao, Praveen Raghavan, Thomas Hoffmann, Saurabh P. Sinha
  • Publication number: 20240107737
    Abstract: A SRAM cell layout that implements stacked transistors is disclosed. The cell layout utilizes both topside metal routing and backside metal routing along with stacked transistors to provide multiple transistors for implementation of inverters and pass gates in a memory cell. Various connection routes between components of the transistors (e.g., gates, sources, and drains) are made to allow cross-coupling between inverters in the memory cell.
    Type: Application
    Filed: August 11, 2023
    Publication date: March 28, 2024
    Inventors: Saurabh P. Sinha, Emre Alptekin, Xin Miao
  • Publication number: 20240105617
    Abstract: Various structures that implement topside metal routing and backside metal routing in combination with vertical transistors are disclosed. The various structures include a building block cell with a metal contact layer between the backside metal routing and the vertical transistors. Various connections can be made within the building block cell to form more complex structures such as, but not limited to, inverter devices, NAND devices, and MUX (multiplexer) devices.
    Type: Application
    Filed: August 11, 2023
    Publication date: March 28, 2024
    Inventors: Xin Miao, Praveen Raghavan, Thomas Hoffmann
  • Publication number: 20240105709
    Abstract: A cell layout that implements stacked transistors is disclosed. The cell layout utilizes both topside metal routing and backside metal routing. Various connection routes between components of the transistors (e.g., gates, sources, and drains) and either the topside metal routing or the backside metal routing can be made. The specific connection routes can be determined based on a desired device construction. Thus, the cell layout disclosed enables various devices to be constructed based on a basic cell structure.
    Type: Application
    Filed: August 11, 2023
    Publication date: March 28, 2024
    Inventors: Saurabh P. Sinha, Xin Miao, Emre Alptekin
  • Publication number: 20240107738
    Abstract: A memory device layout that implements SRAM cells with stacked transistors is disclosed. The memory utilizes both topside metal routing and backside metal routing for routing of bitlines between bit cells with stacked transistors and logic cells coupled to the bit cells.
    Type: Application
    Filed: August 11, 2023
    Publication date: March 28, 2024
    Inventors: Saurabh P. Sinha, Shahzad Nazar, Xin Miao, Emre Alptekin
  • Publication number: 20240084401
    Abstract: Provided herein, in certain embodiments, are various methods, reagents, and devices for detection of multiple target nucleic acids in a sample, or multiple segments of a target nucleic acid in a sample, using a programmable nuclease. In certain embodiments, the present disclosure provides compositions of pools of guide nucleic acids, programmable nucleases, and detector nucleic acids and methods of using said compositions for detection of different segments of one target nucleic acid or different target nucleic acids in a sample.
    Type: Application
    Filed: October 6, 2022
    Publication date: March 14, 2024
    Inventors: Matthew VEROSLOFF, Clare FASCHING, Carley Gelenter HENDRIKS, Xin MIAO, James Paul BROUGHTON, Lucas Benjamin HARRINGTON, Janice Sha CHEN
  • Publication number: 20240061013
    Abstract: A method and device for testing a positioning and speed measuring system main unit. The method includes: obtaining a first simulation signal by simulating an absolute position sensor and a relative position sensor; sending the first simulation signal to a main unit of a to-be-tested positioning and speed measuring system; obtaining a first result calculated by the main unit based on the first simulation signal; obtaining a second result calculated based on the first simulation signal, the second result being a reference result corresponding to the first simulation signal; and determining that the main unit is abnormal if a comparison between the first result and the second result exceeds a first preset range. Therefore, the main unit can still be tested without components including absolute position sensors and relative position sensors, the test process is simple and easy to implement, a test environment can be built without large-scale investment.
    Type: Application
    Filed: January 5, 2022
    Publication date: February 22, 2024
    Applicant: CRRC QINGDAO SIFANG CO., LTD.
    Inventors: Fengchao WANG, Fujie JIANG, Xin MIAO, Jiyu HAN, Dongyu ZHAO
  • Patent number: 11908937
    Abstract: Vertical transport field-effect transistors are formed on active regions wherein the active regions each include a wrap-around metal silicide contact on vertically extending side walls of the active region. Such wrap-around contacts form self-aligned and reliable strapping for SRAM bottom nFET and pFET source/drain regions. Buried contacts of SRAM cells may be used to strap the wrap-around metal silicide contacts with the gates of inverters thereof. Wrap-around metal silicide contacts provide additional contacts for logic FETs and reduce parasitic bottom source/drain resistance.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: February 20, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xin Miao, Kangguo Cheng, Chen Zhang, Wenyu Xu
  • Patent number: 11881505
    Abstract: A semiconductor structure includes a plurality of fins on a semiconductor substrate, the plurality of fins including an alternating sequence of a first nanosheet made of epitaxially grown silicon and a second nanosheet made of epitaxially grown silicon germanium, and a shallow trench isolation region within the semiconductor substrate adjacent to the plurality of fins. The shallow trench isolation region including a recess within the substrate filled with a first liner, a second liner directly above the first liner, a third liner directly above the second liner, and a dielectric material directly above the third liner. The first liner is made of a first oxide material, the third liner is made of a nitride material, and the second liner is made of a second oxide material that creates a dipole effect for neutralizing positive charges within the third liner and positive charges between the third liner and the first liner.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: January 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Choonghyun Lee, Xin Miao, Alexander Reznicek, Jingyun Zhang