Patents by Inventor Xin Xin

Xin Xin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260199882
    Abstract: A mesoporous molecular sieve-based solid acid-base catalyst and a preparation method and use thereof in synthesis of an insulating oil for a transformer are provided. The preparation method of the mesoporous molecular sieve-based solid acid-base catalyst includes the following steps: synthesizing a hard template, preparing a catalyst skeleton, preparing a precursor, and preparing a solid acid-base catalyst.
    Type: Application
    Filed: January 4, 2024
    Publication date: July 16, 2026
    Inventors: Shuguang ZHANG, Zongjun XIN, Manman ZHAO, Xin XIN, Long WANG, Yawen ZHANG, Xingyu CHEN, Hongzheng LIU, Yong LI, Yang YANG
  • Patent number: 12431363
    Abstract: Embodiments provide a method for fabricating a contact structure and a contact structure. The method for fabricating a contact structure includes: providing a substrate, and sequentially arranging a first polysilicon layer and a first mask layer on a surface of the substrate; performing a first etching process on the first polysilicon layer and the first mask layer to form a stepped structure where a width of the first mask layer is smaller than a width of the first polysilicon layer; performing a second etching process on the substrate by using the first polysilicon layer as a mask to form a trench; depositing a second polysilicon layer in the trench, a top of the second polysilicon layer being not higher than a bottom of the first mask layer; and performing an annealing process to form the contact structure.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: September 30, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Xin Xin, Jinghao Wang
  • Publication number: 20250137546
    Abstract: An example valve includes: a plurality of ports including an inlet port, an outlet port, and an exhaust port; a solenoid coil having a cavity; an armature movable in the cavity of the solenoid coil; a retainer mounted at the exhaust port; and a seal mounted to the retainer, wherein as a signal having a particular polarity energizes the solenoid coil, a solenoid force is applied to the armature, causing the armature to move axially in the proximal direction to a particular position, allowing fluid flow from the outlet port, through the retainer, expanding the seal to allow fluid to flow around the seal to be vented to an external environment, while preventing ingestion of foreign substances.
    Type: Application
    Filed: October 9, 2024
    Publication date: May 1, 2025
    Inventors: Jonathan Glenn Walp, Tushar Prakash Honrao, Bárbara Fabiola Álvarez Palomino, Xin Xin
  • Patent number: 12213309
    Abstract: The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: January 28, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi Wu, Yong Lu, Xin Xin
  • Publication number: 20240371387
    Abstract: The present disclosure discloses an area sound pickup method, which includes: receiving a multi-channel voice input signal from the small microphone array device, and performing a non-linear beamforming; performing an area synthesis on a multi-beam data set by using an area synthesis algorithm; processing an area beam signal by using a voice activation detection algorithm based on a neural network; detecting the multi-beam data set and the area beam signal; and enhancing the sound pickup area voice signal, suppressing the to-be-shielded signal, and not processing the noise signals.
    Type: Application
    Filed: January 26, 2022
    Publication date: November 7, 2024
    Inventors: Zhiqiang HU, Xin XIN
  • Patent number: 12063769
    Abstract: Embodiments of the present disclosure provide a semiconductor structure and a method for manufacturing the same. The manufacturing method includes: providing a substrate and bit line structures on the substrate; forming a first isolation layer, the first isolation layer being located on side walls of the bit line structures and on the substrate; forming a second isolation layer, the second isolation layer covering the first isolation layer located on the side walls of the bit line structures, and exposing the first isolation layer located on the substrate; removing the first isolation layer exposed by the second isolation layer and part of the first isolation layer below the second isolation layer, so that remaining of the first isolation layer is recessed compared to the second isolation layer toward the side walls of the bit line structures to form a groove.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: August 13, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jinghao Wang, Xin Xin
  • Patent number: 11792974
    Abstract: The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate including a peripheral region, wherein the peripheral region includes a wire lead-out area, and the substrate is arranged with a plurality of discrete bit line structures; a dielectric layer formed between the adjacent bit line structures, wherein the peripheral region is arranged with a first contact hole; a wire lead-out area with a second through hole; a filling layer filling part of a first contact hole, wherein a remaining part of the first contact hole is defined as a first through hole; a first conductive layer located in the first through hole and the second through hole; and a conductive connecting wire located over the dielectric layer and being in contact with the first conductive layer in the wire lead-out area.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: October 17, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Xin Xin, Jinghao Wang
  • Patent number: 11748950
    Abstract: A display method is provided, including: generating, by a virtual reality device, a selection instruction for target content in response to an operation of a user; identifying, by the virtual reality device, at least one keyword from the target content according to the selection instruction; obtaining, by the virtual reality device, a target 3D environment model and at least one piece of target 3D environment data through matching based on the at least one keyword and a preset matching rule, where the preset matching rule includes a 3D environment model rule and at least one 3D environment data rule; and applying, by the virtual reality device, the at least one piece of target 3D environment data to the target 3D environment model, to present a corresponding 3D virtual reality environment.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: September 5, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xin Xin, Weixi Zheng, Xueyan Huang
  • Publication number: 20230225116
    Abstract: The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate including a peripheral region, wherein the peripheral region includes a wire lead-out area, and the substrate is arranged with a plurality of discrete bit line structures; a dielectric layer formed between the adjacent bit line structures, wherein the peripheral region is arranged with a first contact hole; a wire lead-out area with a second through hole; a filling layer filling part of a first contact hole, wherein a remaining part of the first contact hole is defined as a first through hole; a first conductive layer located in the first through hole and the second through hole; and a conductive connecting wire located over the dielectric layer and being in contact with the first conductive layer in the wire lead-out area.
    Type: Application
    Filed: June 21, 2021
    Publication date: July 13, 2023
    Inventors: Xin XIN, Jinghao WANG
  • Publication number: 20230138089
    Abstract: Embodiments provide a method for fabricating a contact structure and a contact structure. The method for fabricating a contact structure includes: providing a substrate, and sequentially arranging a first polysilicon layer and a first mask layer on a surface of the substrate; performing a first etching process on the first polysilicon layer and the first mask layer to form a stepped structure where a width of the first mask layer is smaller than a width of the first polysilicon layer; performing a second etching process on the substrate by using the first polysilicon layer as a mask to form a trench; depositing a second polysilicon layer in the trench, a top of the second polysilicon layer being not higher than a bottom of the first mask layer; and performing an annealing process to form the contact structure.
    Type: Application
    Filed: July 19, 2022
    Publication date: May 4, 2023
    Inventors: Xin XIN, Jinghao WANG
  • Publication number: 20230054358
    Abstract: The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.
    Type: Application
    Filed: June 15, 2021
    Publication date: February 23, 2023
    Inventors: Gongyi WU, Yong LU, Xin Xin
  • Publication number: 20230055202
    Abstract: Embodiments of the present disclosure provide a semiconductor structure and a method for manufacturing the same. The manufacturing method includes: providing a substrate and bit line structures on the substrate; forming a first isolation layer, the first isolation layer being located on side walls of the bit line structures and on the substrate; forming a second isolation layer, the second isolation layer covering the first isolation layer located on the side walls of the bit line structures, and exposing the first isolation layer located on the substrate; removing the first isolation layer exposed by the second isolation layer and part of the first isolation layer below the second isolation layer, so that remaining of the first isolation layer is recessed compared to the second isolation layer toward the side walls of the bit line structures to form a groove.
    Type: Application
    Filed: July 15, 2021
    Publication date: February 23, 2023
    Inventors: Jinghao WANG, Xin XIN
  • Patent number: 11394947
    Abstract: This application provides a text display method and apparatus in virtual reality, and a virtual reality device. The method includes: receiving text information; determining a font size of the text information based on a pixel per degree PPDVR device of a virtual reality VR device, a pixel per degree PPDHuman eye of an eye of a user, distance information between the text information in VR and the eye of the user, and a correction value ?; rendering the text information based on the font size of the text information; and displaying the rendered text information.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: July 19, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xin Xin, Weixi Zheng, Chang Shi
  • Patent number: 11294535
    Abstract: Embodiments of the present disclosure relate to the field of communications technologies, and in particular, to a virtual reality (VR) interface generation method and an apparatus, to resolve a conventional problem of interface distortion, a twist, and image quality inconsistency when the interface is viewed by an observer. The method includes: obtaining head position information indicating a head position of an observer; generating a first user interface based on the head position information, where distances from all pixels on the first user interface to the observer are equal; and displaying a second user interface that is generated based on the first user interface.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: April 5, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xin Xin, Zhuolun Wang, Sijia Wang
  • Publication number: 20210374972
    Abstract: This disclosure provides a panoramic video data processing method, a terminal, and a storage medium, to improve efficiency for inserting three-dimensional data corresponding to a tracked object, and quickly add a 3D element. The panoramic video data processing method, the terminal, and the storage medium may be applied to the virtual reality (VR), augmented reality (AR), or mixed reality (MR) field. The method includes: obtaining a first sample frame in panoramic video data; determining at least one key object in the first sample frame; obtaining input data; determining a tracked object in the at least one key object based on the input data; obtaining three-dimensional location information of the tracked object in the panoramic video data; and adding tracking data for the tracked object based on the three-dimensional location information.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 2, 2021
    Inventors: Xin XIN, Zhixiong LU, Yasong HUANG, Xueyan HUANG, Weixi ZHENG
  • Patent number: 11080943
    Abstract: Embodiments of the present invention relate to the field of communications technologies, and disclose a method and an apparatus for displaying with a 3D parallax effect, to generate a relatively good 3D parallax effect. A specific solution is: displaying a graphical user interface, where the graphical user interface includes first content, and the first content includes at least two elements; obtaining a first operation instruction which is used for moving, in an area for displaying the first content, at least one first element of the at least two elements; and moving each of the at least one first element by a different distance along a direction of a first straight line, so that the first content has a 3D parallax effect, where the direction of the first straight line is a direction having a preset included angle with a plane in which the graphical user interface is located.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: August 3, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xin Xin, Yu Gao, Jun Chen
  • Publication number: 20210056756
    Abstract: A display method is provided, including: generating, by a virtual reality device, a selection instruction for target content in response to an operation of a user; identifying, by the virtual reality device, at least one keyword from the target content according to the selection instruction; obtaining, by the virtual reality device, a target 3D environment model and at least one piece of target 3D environment data through matching based on the at least one keyword and a preset matching rule, where the preset matching rule includes a 3D environment model rule and at least one 3D environment data rule; and applying, by the virtual reality device, the at least one piece of target 3D environment data to the target 3D environment model, to present a corresponding 3D virtual reality environment.
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Inventors: Xin XIN, Weixi ZHENG, Xueyan HUANG
  • Publication number: 20210018397
    Abstract: An impact testing system includes an impact testing device with a head and a handle to which the head is affixed. The impact testing system also includes at least one vibration sensor. A method of using the impact testing device for automatically assessing impacts applied with the impact testing device to an object is also provided.
    Type: Application
    Filed: March 26, 2018
    Publication date: January 21, 2021
    Inventor: Xin Xin
  • Patent number: D918052
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 4, 2021
    Assignee: CONOPCO, INC.
    Inventors: Gillian Margaret Allan, Xin Xin
  • Patent number: D920127
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: May 25, 2021
    Assignee: CONOPCO, INC.
    Inventors: Gillian Margaret Allan, Xin Xin