Abstract: Embodiments of the present disclosure disclose a semiconductor device including a plurality of sources, a plurality of gates, and a plurality of drains located in an active area. In the active area, the sources, the gates, and the drains are alternately arranged along a first direction, and along the first direction, the sources include two sources respectively closest to ends of the arrangement, and any one of the gates is located between one of the sources and one of the drains, a length of at least a source located at the center along the first direction is greater than lengths of sources located at both ends along the first direction. The semiconductor device further includes a plurality of rows of through holes extending through a substrate and a multilayer semiconductor layer, a plurality of rows of the through holes are arranged along the first direction, and an orthographic projection.

Abstract: Embodiments of the present disclosure provide a semiconductor device and a method for manufacturing the same. The semiconductor device includes an active region and an inactive region located outside of the active region, the semiconductor device including a substrate, a semiconductor layer including a first semiconductor layer located in the active region and a second semiconductor layer located in the inactive region, a source, a drain, and a gate. A via hole penetrated through the substrate and the semiconductor layers below the source is provided below the source. A part of the via hole is located in the second semiconductor layer of the inactive region and penetrates at least one part of the second semiconductor layer.

Abstract: A semiconductor device is disclosed, comprising: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode disposed between the source electrode and the drain electrode; a dielectric layer disposed on at least a part of the surface of the semiconductor layer which is between the gate electrode and the drain electrode, the dielectric layer having at least a recess therein; and a source field plate disposed on the dielectric layer and at least partially covering the recess, the source field plate being electrically connected to the source electrode through at least a conductive path, wherein a part of the source field plate above the gate electrode has a varying distance from an upper surface of the semiconductor layer. A method of manufacturing such a semiconductor device is also disclosed.

Abstract: Embodiments of the present disclosure provide a semiconductor device and a method for manufacturing the same. The semiconductor device includes an active region and an inactive region located outside of the active region, the semiconductor device including a substrate, a semiconductor layer including a first semiconductor layer located in the active region and a second semiconductor layer located in the inactive region, a source, a drain, and a gate. A via hole penetrated through the substrate and the semiconductor layers below the source is provided below the source. A part of the via hole is located in the second semiconductor layer of the inactive region and penetrates at least one part of the second semiconductor layer.

Abstract: A semiconductor device is disclosed, comprising: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode disposed between the source electrode and the drain electrode; a dielectric layer disposed on at least a part of the surface of the semiconductor layer which is between the gate electrode and the drain electrode, the dielectric layer having at least a recess therein; and a source field plate disposed on the dielectric layer and at least partially covering the recess, the source field plate being electrically connected to the source electrode through at least a conductive path, wherein a part of the source field plate above the gate electrode has a varying distance from an upper surface of the semiconductor layer. A method of manufacturing such a semiconductor device is also disclosed.