Abstract: An apparatus for power conversion is provided. The apparatus comprises: a plurality of partial power converters (PPCs), wherein each of the plurality of PPCs comprises three ends, the three ends being combined in pairs to form three sets of ends, and wherein a first one of the three sets of ends is connected or connectable to a DC bus, and a second one of the three sets of ends is connectable or connected to a respective power source of a plurality of power sources.

Abstract: An IC test method, comprising: electrically connecting a circuit board to a first IC; generating a first test signal to test the first IC; electrically connecting the circuit board to a first adaption board, and electrically connecting a second IC to the first adaption board, wherein a first connection mechanism between the first IC and the circuit board and a second connection mechanism between the second IC and the circuit board are different; and generating a second test signal to test the second IC by the control IC.

Abstract: The invention discloses a method for synthesizing 1,7-naphthyridine derivatives, which relates to the technical field of synthesizing pharmaceutical intermediates and organic chemical intermediates, wherein the method includes: (1) 2-chloro-3-amino-pyridine being used as Compound I as a starting material, and protecting an amino group to prepare Compound II; (2) the Compound II reacting with an aldehydation reagent under alkaline conditions to obtain Compound III; (3) cyclizing the Compound III with acrylate compounds under the action of Lewis acid to prepare compound IV.

Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.

Abstract: A microgrid self-triggering control method and system for resisting FDI attacks is provided. The method includes the following steps: S1: adopting primary control based on droop control for a microgrid; S2: designing a secondary control strategy of the microgrid, where the secondary control strategy includes frequency recovery and fair distribution of active power; and S3: designing a microgrid distributed self-triggering control method of a hash encryption method after considering the condition that the FDI attacks are injected into a secondary control communication link, so as to resist false malicious data in the microgrid and achieve secondary control. According to the microgrid self-triggering control method and system, a distributed secondary control target of the microgrid is achieved even under the FDI attacks, the injected malicious data can be quickly detected and eliminated, and the distributed secondary control communication network of the microgrid can be protected.

Abstract: A method for controlling at least one power converter is disclosed. The method includes generating at least one electrochemical impedance spectra (EIS) reference signal, the at least one EIS reference signal each having a frequency selected for EIS: superimposing the at least one EIS reference signal respectively on at least one control reference signal to produce at least one superimposed reference signal: controlling the at least one power converter respectively based on the at least one superimposed reference signal to cause respectively charging/discharging at least one battery module: acquiring at least one response signal produced respectively by the at least one battery module; and calculating at least one EIS respectively for the at least one battery module respectively based on the at least one superimposed reference signal and the at least one response signal.

Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line E connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.

Abstract: Embodiments of this application disclose a system frame number synchronization method, applied to a communication system defined in the enhanced common public radio interface eCPRI protocol. The communication system includes radio equipment control and radio equipment. The method includes: The radio equipment control generates system frame information, where the system frame information indicates a system frame number; and the radio equipment control sends the system frame information to the radio equipment by using a control plane message. A system frame number used by the radio equipment is consistent with the system frame number used by the radio equipment control.

Abstract: Embodiments of present disclosure relate to an apparatus and a method for controlling a delta-connected cascaded multilevel converter. The apparatus (100) for controlling a delta-connected cascaded multilevel converter (110) comprises: a converter controller (102) configured to: receive current signals indicating phase currents flowing through respective phase arms of the converter (110); determine a harmonic current signal indicating a circulating current of the converter (110) from the current signals; and generate, based on the determined harmonic current signal and a reference current signal, a harmonic voltage signal to cause an amplitude of the circulating current flowing through the phase arms of the converter (110) to be a predetermined amplitude.

Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.

Abstract: Provided is a display device. The display device includes: a display module, having a bendable display region and a planar display region; an encapsulation housing, disposed on a non-display side of the display module, wherein a receiving chamber is formed between the encapsulation housing and the non-display side of the display module; and at least one support assembly, disposed in the receiving chamber, wherein the support assembly at least comprises a first retractable linkage and a first drive motor, a first end of the first retractable linkage is connected to the encapsulation housing, and a second end of the first retractable linkage is connected to the non-display side of the display module.

Abstract: Provided is a display panel. The display panel includes a base substrate; and a total reflection electrode layer, a light-emitting layer, a semi-reflection electrode layer, a first resonance layer, and a second resonance layer which are sequentially laminated in a direction distal from the base substrate, wherein the first resonance layer is configured to reflect first light and allow second light to pass through; the second resonance layer is configured to reflect third light and allow fourth light to pass through; all of the first light, the second light, the third light, and the fourth light are light passing through the semi-reflection electrode layer; and a refractive index of the first resonance layer is different from a refractive index of the second resonance layer.

Abstract: The present disclosure provides a display device and a display substrate. The display substrate may include a substrate, a plurality of pixel units and a thermal compensation structure. The plurality of pixel units are arranged on a side of the substrate. Each of the pixel units includes a plurality of sub-pixels, and the plurality of sub-pixels include a first sub-pixel and a second sub-pixel. A brightness decay rate of the first sub-pixel is less than that of the second sub-pixel. A thermal compensation structure is configured to provide heat. Heat provided by the thermal compensation structure for the first sub-pixel is greater than that provided by the thermal compensation structure for the second sub-pixel. The heat provided by the thermal compensation structure for the second sub-pixel is greater than or equal to zero.

Abstract: A fault-tolerant oriented physical design method for fully programmable valve array biochips is provided. The method comprises the following steps: step S1: constructing component placement constraints, and performing dynamic fault-tolerant placement based on a dynamic constraint placement algorithm of particle swarm optimization and in combination with dynamic fault-tolerant technology, thereby obtaining a fault-tolerant placement scheme without component conflicts; step S2: considering an input sequence of reagents and an A* fault-tolerant routing algorithm based on an optimal input sequence, performing dynamic fault-tolerant routing in combination with the dynamic fault-tolerant technology; and step S3: further processing fluid conflicts in the routing through a routing optimization strategy based on priority and backtracking, so as to obtain a fault-tolerant routing scheme without fluid conflicts.

Abstract: Embodiments of a modular direct current interconnection device (MDCID) include at least three operation branches, at least one transient branch, and a local controller. Each of the operation branches includes a first terminal coupled to a common node and configured to transmit DC current in a normal mode. The transient branch is coupled between second terminals of different ones of the at least three operation branches and configured to provide a transient DC current path in a fault clearance mode. The local controller is coupled to the operation branches and the transient branch, and the local controller is configured to control operation of the operation branches and the transient branch.

Abstract: A power converter includes a power conversion circuit having a first terminal set and a second terminal set, configured to convert power input via one of the first terminal set and the second terminal set and output the converted power via the other of the first terminal set and the second terminal set; a measurement unit; a controller configured to control the power conversion circuit to generate a voltage/current waveform travelling along the first network with a power supplied by a second power source linked to the second terminal set of the power conversion circuit in response to a condition that a change rate of the measurement of the voltage/current exceeds a threshold; and locate a fault on the first network. The power conversion circuit can be re-used for different modes of operation either for power transmission under normal condition or for fault location under fault condition.