Patents by Inventor Xing Hui

Xing Hui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12314166
    Abstract: Methods, systems, and devices for mapping descriptors for read operations are described. A memory device may include a first cache may include a mapping table between the logical addresses and the physical addresses, and a second cache may include one or more descriptors of one or more physical addresses of the memory array. A descriptor may include a starting logical address, a starting physical address, and a quantity of addresses in the descriptor, and may be configured to identify addresses or sets of address that are frequently accessed. When an access command (e.g., a read command) is received, the first cache may be queried and then the second cache may be queried (if there is a cache miss at the first cache). The physical address of the data of the memory array may be determined (and accessed) based on the descriptors stored in the second cache.
    Type: Grant
    Filed: March 12, 2024
    Date of Patent: May 27, 2025
    Assignee: Micron Technology, Inc.
    Inventor: Xing Hui Duan
  • Publication number: 20240296116
    Abstract: Methods, systems, and devices for mapping descriptors for read operations are described. A memory device may include a first cache may include a mapping table between the logical addresses and the physical addresses, and a second cache may include one or more descriptors of one or more physical addresses of the memory array. A descriptor may include a starting logical address, a starting physical address, and a quantity of addresses in the descriptor, and may be configured to identify addresses or sets of address that are frequently accessed. When an access command (e.g., a read command) is received, the first cache may be queried and then the second cache may be queried (if there is a cache miss at the first cache). The physical address of the data of the memory array may be determined (and accessed) based on the descriptors stored in the second cache.
    Type: Application
    Filed: March 12, 2024
    Publication date: September 5, 2024
    Inventor: Xing Hui Duan
  • Publication number: 20240164059
    Abstract: A vapor chamber structure includes an aluminum upper plate, an aluminum lower plate, a working fluid and multiple micron-sized recesses. The aluminum upper plate has a first side and a second side. The aluminum lower plate has a third side and a fourth side. The aluminum upper and lower plates are correspondingly mated with each other to define an airtight chamber. The working fluid is filled in the airtight chamber. The micron-sized recesses are directly formed on the third side. The micron-sized recesses are upward raised and/or downward recessed from the third side in the form of multiple small puddles so as to enhance the boiling efficiency of the working fluid in the airtight chamber and promote liquid-vapor circulation performance of the vapor chamber. In addition, when used in a low-temperature environment, the vapor chamber structure prevents the working fluid in the airtight chamber from freezing.
    Type: Application
    Filed: March 20, 2023
    Publication date: May 16, 2024
    Inventors: Han-Min Liu, Wen-Qi Liu, Xing-Hui Li, Xiao-Xiang Zhou
  • Patent number: 11947451
    Abstract: Methods, systems, and devices for mapping descriptors for read operations are described. A memory device may include a first cache may include a mapping table between the logical addresses and the physical addresses, and a second cache may include one or more descriptors of one or more physical addresses of the memory array. A descriptor may include a starting logical address, a starting physical address, and a quantity of addresses in the descriptor, and may be configured to identify addresses or sets of address that are frequently accessed. When an access command (e.g., a read command) is received, the first cache may be queried and then the second cache may be queried (if there is a cache miss at the first cache). The physical address of the data of the memory array may be determined (and accessed) based on the descriptors stored in the second cache.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: April 2, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Xing Hui Duan
  • Patent number: 11869227
    Abstract: Image recognition may include obtaining a first image, segmenting the first image into a plurality of first regions by using a target model, and searching for a target region among bounding boxes in the first image that use points in the first regions as centers. The target region is a bounding box in the first image in which a target object is located. The target model is a pre-trained neural network model configured to recognize from an image, a region in which the target object is located. The target model is obtained through training by using positive samples with a region in which the target object is located marked and negative samples with a region in which a noise is located marked. The target region is marked in the first image to improve accuracy of target object detection in an image.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: January 9, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Zi Jian Zhang, Zhong Qian Sun, Xing Hui Fu, Wei Yang
  • Publication number: 20230243594
    Abstract: A thermal module includes a copper base seat, at least one U-shaped aluminum heat pipe, an aluminum radiating fin assembly and a copper embedding layer. The copper base seat has a heat absorption side and a heat conduction side. The heat absorption side or the heat conduction side is recessed to form at least one first heat pipe receiving channel. The U-shaped aluminum heat pipe has a horizontal section as a heat absorption section and two vertical sections as condensation sections. The heat absorption section is positioned in the first heat pipe receiving channel. The aluminum radiating fin assembly has multiple radiating fins. The copper embedding layer is disposed on a surface of the heat absorption section of the U-shaped aluminum heat pipe. By means of the copper embedding layer, two different materials can be directly welded.
    Type: Application
    Filed: December 12, 2022
    Publication date: August 3, 2023
    Inventors: Chih-Peng Chen, Han-Min Liu, Xing-Hui Li
  • Publication number: 20230153234
    Abstract: Methods, systems, and devices for mapping descriptors for read operations are described. A memory device may include a first cache may include a mapping table between the logical addresses and the physical addresses, and a second cache may include one or more descriptors of one or more physical addresses of the memory array. A descriptor may include a starting logical address, a starting physical address, and a quantity of addresses in the descriptor, and may be configured to identify addresses or sets of address that are frequently accessed. When an access command (e.g., a read command) is received, the first cache may be queried and then the second cache may be queried (if there is a cache miss at the first cache). The physical address of the data of the memory array may be determined (and accessed) based on the descriptors stored in the second cache.
    Type: Application
    Filed: April 22, 2020
    Publication date: May 18, 2023
    Inventor: Xing Hui Duan
  • Publication number: 20210224998
    Abstract: Image recognition may include obtaining a first image, segmenting the first image into a plurality of first regions by using a target model, and searching for a target region among bounding boxes in the first image that use points in the first regions as centers. The target region is a bounding box in the first image in which a target object is located. The target model is a pre-trained neural network model configured to recognize from an image, a region in which the target object is located. The target model is obtained through training by using positive samples with a region in which the target object is located marked and negative samples with a region in which a noise is located marked. The target region is marked in the first image to improve accuracy of target object detection in an image.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 22, 2021
    Applicant: Tencent Technology (Shenzhen) Company Limited
    Inventors: Zi Jian ZHANG, Zhong Qian SUN, Xing Hui FU, Wei YANG
  • Publication number: 20170035280
    Abstract: A stereoscopic endoscope system for concurrently imaging at both visible and NIR wavelengths includes an endoscope operable to transmit both visible and NIR wavelengths and a light source operable to generate visible light and NIR excitation light. An intensity of the visible light is independent of an intensity of the NIR excitation light. The stereoscopic endoscope system also includes a stereoscopic camera having a single image sensor operable to detect a left eye image or a right eye image at both visible and NIR wavelengths, a controller coupled to the light source and the stereoscopic camera, and a display device operable to be viewed using stereoscopic spectacles.
    Type: Application
    Filed: August 7, 2015
    Publication date: February 9, 2017
    Inventors: Chunxin Yang, Xing Hui, Baiyu Wang, Claudio Immekus
  • Patent number: 9547165
    Abstract: A method of operating an endoscopy system includes concurrently illuminating a tissue with NIR excitation light and visible light, imaging the tissue using a single detector, and independently adjusting an intensity of the NIR excitation light and an intensity of the visible light.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: January 17, 2017
    Assignee: REINROTH GMBH
    Inventors: Chunxin Yang, Xing Hui, Baiyu Wang, Claudio Immekus
  • Patent number: 9342246
    Abstract: An apparatus comprising an interface and a control circuit. The interface may be configured to process a plurality of read/write operations to/from a memory. The control circuit may be configured to determine if a read disturb has occurred. If the read disturb has occurred, the control circuit may (a) determine a size of a group of the read/write operations and (b) write all of the group of the read/write operations to one of a plurality of memory modules of the memory.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: May 17, 2016
    Assignee: Seagate Technology LLC
    Inventors: Zhiqing Zhang, Yuan Chen, Yun Shun Tan, Xing Hui Duan, Lin Feng Chen
  • Publication number: 20160062103
    Abstract: A method of operating an endoscopy system includes concurrently illuminating a tissue with NIR excitation light and visible light, imaging the tissue using a single detector, and independently adjusting an intensity of the NIR excitation light and an intensity of the visible light.
    Type: Application
    Filed: August 29, 2014
    Publication date: March 3, 2016
    Inventors: Chunxin Yang, Xing Hui, Baiyu Wang, Claudio Immekus
  • Publication number: 20150286407
    Abstract: An apparatus comprising an interface and a control circuit. The interface may be configured to process a plurality of read/write operations to/from a memory. The control circuit may be configured to determine if a read disturb has occurred. If the read disturb has occurred, the control circuit may (a) determine a size of a group of the read/write operations and (b) write all of the group of the read/write operations to one of a plurality of memory modules of the memory.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Inventors: Zhiqing Zhang, Yuan Chen, Yun Shun Tan, Xing Hui Duan, Lin Feng Chen
  • Patent number: 9092310
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules each having a size less than a total size of the memory. The controller is configured to (i) determine if a read disturb has occurred, and (ii) if the read disturb has occurred, the controller (a) determines a size of the group of read/write operations, and (b) writes all of the group of read/write operations to one of the memory modules.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: July 28, 2015
    Assignee: Seagate Technology LLC
    Inventors: Zhiqing Zhang, Yuan Chen, Yun Shun Tan, Xing Hui Duan, Lin Feng Chen
  • Publication number: 20140281281
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules each having a size less than a total size of the memory. The controller is configured to (i) determine if a read disturb has occurred, and (ii) if the read disturb has occurred, the controller (a) determines a size of the group of read/write operations, and (b) writes all of the group of read/write operations to one of the memory modules.
    Type: Application
    Filed: April 2, 2013
    Publication date: September 18, 2014
    Applicant: LSI Corporation
    Inventors: Zhiqing Zhang, Yuan Chen, Yun Shun Tan, Xing Hui Duan, Lin Feng Chen