Patents by Inventor Xing Lee

Xing Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9305582
    Abstract: Various embodiments of the present invention provide systems and methods for determining changes in fly-height. For example, various embodiments of the present invention provide storage devices that include a storage medium having servo data thereon. A read/write head assembly is disposed in relation to the storage medium. A servo based fly-height adjustment circuit receives the servo data via the read/write head assembly, and calculates a first harmonics ratio based on the received data and compares the first harmonics ratio with a second harmonics ratio to determine an error in the distance between the read/write head assembly and the storage medium.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: April 5, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, Jeffrey P. Grundvig, Viswanath Annampedu
  • Patent number: 9281908
    Abstract: Various embodiments of the present invention provide systems and methods for estimating signal and noise powers in a received signal set. For example, one embodiment of the present invention provides a method for determining signal power and noise power. The method uses a storage medium that includes a Na×Nw data pattern. The Na×Nw data pattern includes Na bits repeated Nw times. Both Na and Nw are each greater than one. The methods further include performing an initial read of the Na×Nw data pattern, which is stored to a first register.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: March 8, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, David L. Parker, Scott M. Dziak
  • Publication number: 20150074589
    Abstract: The present invention provides a smart mobile device having a dual-window displaying function. This smart mobile device comprises a first displaying region, a second displaying region, a separation bar, at least one status bar and at least one operation bar.
    Type: Application
    Filed: December 27, 2013
    Publication date: March 12, 2015
    Applicant: Shanghai PowerMo Information Tech. Co. Ltd.
    Inventors: Qi Pan, Xing Lee, Jian-Jing Shen, Xiong-Hui Guo
  • Publication number: 20140359445
    Abstract: An audio management method and an implementation in an Android Operating System are provided for allowing an electronic device to manipulate audio control of a multiple-window system and for allowing a user to manipulate audio control of execution environments corresponding to each of the plurality of windows, such as switching to a mute mode, switching to a normal audio mode, raising volume, and/or decreasing volume, and various sound processing, etc. The multiple-window system can be implemented by a multiple-window system with a plurality of windows in a single electronic device, or can be implemented by a multiple-device system including an electronic device connecting with another remote device wherein the remote device is used as an extended window. The electronic device can maintain a plurality of execution environments, wherein each of the plurality of execution environments is corresponding to a window system.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 4, 2014
    Applicant: Shanghai PowerMo Information Tech. Co. Ltd.
    Inventors: Xing Lee, Qi Pan, Jian-Jing Shen, Xiong-Hui Guo
  • Patent number: 8804260
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: August 12, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Jongseung Park, Shaohua Yang, Erich F. Haratsch, Ming Jin, Yuan Xing Lee
  • Patent number: 8745439
    Abstract: Various embodiments of the present invention provide systems and methods for deriving data from a defective media region. As an example, a method for deriving data from a defective media region is disclosed that includes providing a storage medium and performing a media defect detection that indicates a defective region on the storage medium. A first data decode is performed on data corresponding to the defective region. The first data decode yields a first output. It is determined that the first output failed to converge and based at least in part on the failure of the first output to converge, a second data decode is performed on the data corresponding to the defective region. The second data decode includes zeroing out any soft data corresponding to the defective region and providing a second output.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Weijun Tan, Yuan Xing Lee
  • Patent number: 8743936
    Abstract: Various embodiments of the present invention provide systems and methods for estimating noise components in a received signal set. For example, one embodiment of the present invention provides a noise estimation circuit that includes a data detector circuit and a noise component calculation circuit. The data detector circuit receives a series of data samples and provides a detected output, and the noise component calculation circuit provides an electronics noise power output and a media noise power output each calculated based at least in part on the detected output and the series of data samples.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Shaohua Yang, Yuan Xing Lee, Hongwei Song
  • Patent number: 8587888
    Abstract: Methods and apparatus are provided for detection of a synchronization mark based on a position of an extreme distance metric. A synchronization mark is detected in a received signal by computing a distance metric between the received signal and an ideal version of the received signal expected when reading the synchronization mark, wherein the distance metric is computed for a plurality of positions within a search window; determining a substantially extreme distance metric within the search window; and detecting the synchronization mark based on a position of the substantially extreme distance metric. The distance metric can comprise a sum of square differences or a Euclidean distance between the received signal and the ideal version of the received signal.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: November 19, 2013
    Assignee: LSI Corporation
    Inventors: Erich F. Haratsch, Shaohua Yang, Nenad Miladinovic, Yuan Xing Lee
  • Patent number: 8578253
    Abstract: Various embodiments of the present invention provide systems and methods for updating detector parameters in a data processing circuit. For example, a data processing circuit is disclosed that includes a first detector circuit, a second detector circuit, and a calibration circuit. The first detector circuit is operable to receive a first data set and to apply a data detection algorithm to the first data set, and the second detector circuit is operable to receive a second data set and to apply the data detection algorithm to the second data set. The calibration circuit is operable to calculate a data detection parameter based upon a third data set. The data detection parameter is used by the first detector circuit in applying the data detection algorithm to the first data set during a period that the data detection parameter is used by the second detector circuit in applying the data detection algorithm to the second data set.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: November 5, 2013
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Jonseung Park, Changyou Xu, Madhusudan Kalluri, Yuan Xing Lee, Kapil Gaba
  • Publication number: 20130275717
    Abstract: Various embodiments of the present invention provide systems and methods for a multi-tier data processing system. For example, a data processing system is disclosed that includes an input operable to receive data to be processed, a first data processor operable to process at least some of the data, a second data processor operable to process a portion of the data not processed by the first data processor, wherein the first data processor has a higher throughput than the second data processor, and an output operable to yield processed data from the first data processor and the second data processor.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 17, 2013
    Inventors: Bruce Wilson, Shaohua Yang, Yuan Xing Lee, Daniel Scott Fisher
  • Patent number: 8468418
    Abstract: Various embodiments of the present invention provide systems and methods for variable iteration data processing.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: June 18, 2013
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Hao Zhong, Weijun Tan, Richard Rauschmayer, Yuan Xing Lee
  • Patent number: 8458553
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes receiving a codeword that has at least a first circulant with a plurality of data bits and a first circulant parity bit, a second circulant with a plurality of data bits and a second circulant parity bit, and one or more codeword parity bits. The methods further include decoding the codeword using the one or more codeword parity bits to access the first circulant and the second circulant, performing a first circulant parity check on the first circulant, and performing a second circulant parity check on the second circulant.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: June 4, 2013
    Assignee: LSI Corporation
    Inventors: Hao Zhong, Weijun Tan, Yang Han, Zongwang Li, Shaohua Yang, Yuan Xing Lee
  • Patent number: 8443267
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a processing loop circuit having a data detector and a soft decision decoder. The data detector provides a detected output, and the soft decision decoder applies a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output. The systems further include a queuing buffer and a hard decision decoder. The queuing buffer is operable to store the soft decision output, and the hard decision decoder accesses the soft decision output and applies a hard decoding algorithm to yield a second hard decision output. The data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: May 14, 2013
    Assignee: LSI Corporation
    Inventors: Hao Zhong, Shaohua Yang, Weijun Tan, Changyou Xu, Yuan Xing Lee
  • Patent number: 8423873
    Abstract: Two levels of error correction decoding are performed using first and second level decoders. A composite code formed by combining an inner component code and an outer component code can be used to decode the data and correct any errors. Performing two level decoding using a composite code allows the size of the inner parity block to be reduced to a single Reed-Solomon symbol while keeping a good code rate. The first level decoder generates soft information. The soft information can indicate a most likely error event for each possible syndrome value of the inner component code. The soft information can also include error metric values for each of the most likely error events. The second level decoder generates corrected syndrome values based on the soft information using the outer component code. The most likely trellis path that corresponds to the corrected syndrome values is then selected.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: April 16, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Shaohua Yang, Richard Leo Galbraith, Ksenija Lakovic, Yuan Xing Lee, Travis Oenning, Jongseung Park, Hideki Sawaguchi, Bruce A. Wilson
  • Patent number: 8391001
    Abstract: A sliding hinge is provide, including a first member, a cover, a bottom cover movable relative to the first member, a sling plate fixed to the bottom cover, and an elastic module. The first member has a main body and a connection portion protruding therefrom, wherein the connection portion has a recess. The cover is fixed to the connection portion, wherein the cover and the first member form a space therebetween to receive the sling plate and the elastic module. The elastic module has an end received in the recess.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: March 5, 2013
    Assignee: HTC Corporation
    Inventors: Ying-Xing Lee, Chien-Wei Huang, Chien-Hung Chen
  • Patent number: 8379396
    Abstract: A connecting mechanism is provided to connect an input module to a display module of an electronic device, wherein the display module is slidable relative to the input module along a first direction. The connecting mechanism includes a FPC and a sliding hinge comprising a fixed member fixed to the input module, a slider fixed to the display module, and a sliding plate fixed to the slider and movably received in a concave space of the fixed member. The FPC has a first portion extended from a side wall of the fixed member to the middle of the slider along a second direction, and the first portion is bent and extended along the first direction to an opening of the slider. A bent portion of the FPC passes through the opening to connect the first portion and a second portion of the FPC, wherein the first and second portions are on opposite sides of the slider.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: February 19, 2013
    Assignee: HTC Corporation
    Inventors: Chien-Wei Huang, Ying-Xing Lee, I-Cheng Chuang
  • Patent number: 8369076
    Abstract: A moving mechanism is provided, including a torsion hinge, a slider, a lock member, and an elastic member disposed on the slider. The torsion hinge has a first plate and a second plate rotatable relative to each other. The lock member is rotatable relative to the first plate, and the slider is movably disposed on the second plate. When the moving mechanism is in a closed state, the lock member is engaged with a slot portion of the second plate, so as to restrict the second plate in a predetermined angle. When the slider slides relative to the second plate to a critical position, the elastic member pushes the lock member to release from the slot portion, such that the second plate is rotatable to an open position.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: February 5, 2013
    Assignee: HTC Corporation
    Inventors: I-Cheng Chuang, Ying-Xing Lee, Chien-Wei Huang, Ying-Yen Cheng, Ying-Hao Yeh
  • Patent number: 8352841
    Abstract: Various embodiments of the present invention provide systems and methods for out of order memory management. For example, a method for out of order data processing is disclosed. The method includes providing an out of order codeword memory circuit that includes a number of codeword memory locations in a codeword memory area and the same number of index values in an index area. Each of the index values corresponds to a respective one of the codeword memory locations. The methods further include receiving a data set; storing the data set to one of the codeword memory locations; receiving an indication that the data set stored in the one of the codeword memory locations has completed processing; and grouping an index value corresponding to the one of the codeword memory locations with one or more other index values corresponding to unused codeword memory locations.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: January 8, 2013
    Assignee: LSI Corporation
    Inventors: Lingyan Sun, Hongwei Song, Yuan Xing Lee
  • Patent number: 8345373
    Abstract: Various embodiments of the present invention provide systems and methods for phase offset based spectral aliasing compensation. For example, a circuit for spectral aliasing reduction is disclosed that includes a phase shift circuit operable to phase shift an analog input signal and to provide a phase shifted analog signal; a first analog to digital converter circuit operable to provide a first series of digital samples corresponding to the analog input signal at a sampling frequency; a second analog to digital converter circuit operable to provide a second series of digital samples corresponding to the phase shifted analog signal at the sampling frequency; and an averaging circuit operable to average the first series of digital samples with the second series of digital samples to yield an average output.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song
  • Patent number: 8341506
    Abstract: Techniques are provided for iteratively decoding data recorded on a data storage device. An iterative decoder decodes the data using multiple decoding iterations to correct errors. In multiple iterations of the iterative decoder, a post processing block generates soft information, and a decoder applies a minimum sum decoding algorithm to a low density parity check (LDPC) code to generate extrinsic information based on the soft information and updated soft information.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: December 25, 2012
    Assignee: HGST Netherlands B.V.
    Inventors: Zongwang Li, Yuan Xing Lee, Richard Leo Galbraith, Ivana Djurdjevic, Travis Roger Oenning