Abstract: A display substrate, comprising a base substrate and a scan drive control circuit which is disposed in a non-display area of the base substrate. The scan drive control circuit comprises an input circuit, an output control circuit, and an output circuit. The output control circuit is connected to the input circuit and the output circuit. The output control circuit comprises a first node control capacitor and a second node control capacitor. The length of the first node control capacitor in a first direction LC1k, the length of the second node control capacitor in the first direction LC2k and the length of the scan drive control circuit in the first direction LY satisfy the following formula: L C ? 1 ? k L Y < L C ? 2 ? k L Y ; L C ? 1 ? k L Y < 0.2 .

Abstract: The present invention relates to the fields of microorgan-isms, feed, food and ecological restoration, in particular to a strain for degrading deoxynivalenol (DON) and the use thereof. The strain has the deposit number CCTCC No. M 2020565. The strain can grow by means of taking the toxic compound DON as a sole carbon source, and convert the DON into chemical components for itself. The reaction process is irreversible, the reaction conditions are moderate, and secondary pollu-tion cannot be caused. The strain provided in the present invention can be used for preparing a biological detoxification preparation for DON. The strain provided in the present invention can be used for degrading DON in feed and food raw materials, primary processing products, deep processing products and related processing byproducts. The strain provided in the present invention can be applied to various ecosystems such as soil or bodies of water polluted by DON to achieve the purposes of DON degradation and ecological restoration.

Abstract: A display substrate is provided to include: a base substrate including a display area and a peripheral area surrounding the display area; pixel units in array are in the display area; a driving module is in the peripheral area and is configured to provide electrical signals for the pixel units, to control the pixel units to operate; the driving module includes driving circuits each provided with a corresponding operating signal line group in the peripheral area; the signal line group includes at least two operating signal lines connected to the corresponding driving circuit, to provide electrical signals thereto; the at least two operating signal lines include first and second clock signal lines; the first clock signal lines for at least two driving circuits are a same first clock signal line; and/or the second clock signal lines for the at least two driving circuits are a same second clock signal line.

Abstract: A shift register, a driving method, a driving control circuit and a display device. The method comprises: at a data refresh stage (T10), applying to an input signal end (IP) an input signal having a pulse level, applying a control clock pulse signal to a control clock signal end, and applying a noise reduction clock pulse signal to a noise reduction clock signal end; at a noise reduction holding phase (T21-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a fixed voltage signal to the noise reduction clock signal end; and at a noise reduction enhancement stage (T22-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a clock pulse signal to the noise reduction clock signal end.

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a first scan driving circuit, a second scan driving circuit and a first power line arranged in sequence, and a first shielding layer and a second shielding layer sequentially arranged on a side of the second scan driving circuit away from the base substrate; the first shielding layer covers at least one transistor in the second scan driving circuit, and the second shielding layer covers at least one transistor of transistors in the second scan driving circuit except the at least one transistor covered by the first shielding layer; and the second shielding layer is also on a side of the first scan driving circuit away from the base substrate, and the second shielding layer covers at least one transistor in the first scan driving circuit.

Abstract: Provided is a method for driving a display device including n rows of sub-pixels; the method includes: driving the first frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on a rows, from the 1st to ath rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n?a) rows, from the (a+1)th to nth rows, of sub-pixels in a second darkness insertion sub-period driving a second frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on b rows, from the 1st to bth rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n?b) rows, from the (b+1)th to nth rows, of sub-pixels in a second darkness insertion sub-period.

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a gate scan driving circuit, a light-emitting control scan driving circuit, and a first power line, the gate scan driving circuit includes a first stabilizing capacitor, a first electrode plate of the first stabilizing capacitor is electrically connected to the output terminal of the gate scan driving circuit; and the light-emitting control scan driving circuit includes a second stabilizing capacitor, a first electrode plate of the second stabilizing capacitor is electrically connected to the output terminal, a second electrode plate of the second stabilizing capacitor is electrically connected to the first power line, the second electrode plate of the second stabilizing capacitor includes a first part and a second part, and an organic insulation layer is provided between the first part and the second part.

Abstract: A method for accessing a service system includes: receiving fingerprint information of a to-be-verified terminal device and identification information of a to-be-verified user from a login computer system based on a service access instruction to access the service server; verifying, according to the fingerprint information of the to-be-verified terminal device and the identification information of the to-be-verified user, whether the to-be-verified terminal device is a specified device of the to-be-verified user based on a specified device database, the specified device database comprising identification information of each user and fingerprint information of a specified device of each user; determining, according to a result of the verifying, whether to allow the login computer system to access the service server according to the service access instruction; and if yes, sending a notification to the login computer system to enable the login computer system to access the service server.

Abstract: According to embodiments of the present disclosure, a method, apparatus, device and storage medium for managing traffic data of a client application is provided. The method described herein comprises: detecting a transmission of user data of a target user from the client application to a server; analyzing the traffic data of the transmission at different layers of the transmission based on types of the traffic data; and in accordance with a determination that the analysis indicates that the traffic data satisfies a data exchange constraint corresponding to the target user, transmitting the traffic data to a server in compliance with the data exchange constraint. In this way, by analyzing the traffic data at different layers of the transmission and restricting traffic data that does not satisfy the data exchange constraint, it is possible to effectively prevent user data from being transmitted to unauthorized servers via various types of traffic data.

Abstract: According to embodiments of the present disclosure, a method, apparatus, device and storage medium for managing traffic data of a client application is provided. The method described herein comprises: detecting a transmission of user data of a target user from the client application to a server; analyzing the traffic data of the transmission at different layers of the transmission based on types of the traffic data; and in accordance with a determination that the analysis indicates that the traffic data satisfies a data exchange constraint corresponding to the target user, transmitting the traffic data to a server in compliance with the data exchange constraint. In this way, by analyzing the traffic data at different layers of the transmission and restricting traffic data that does not satisfy the data exchange constraint, it is possible to effectively prevent user data from being transmitted to unauthorized servers via various types of traffic data.

Abstract: A method, apparatus, electronic device, storage medium and program product of code management are provided. In response to a request for building an executable file, corresponding developed code is obtained from a code library. The developed code is compiled into intermediate code to determine security of the intermediate code. In response to determining that the intermediate code is secure, an executable file is generated based on the intermediate code.

Abstract: Provided is a method for driving a display device, including n rows of sub-pixels; the method includes: driving the first frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on a rows, from the 1st to ath rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n?a) rows, from the (a+1)th to nth rows, of sub-pixels in a second darkness insertion sub-period driving a second frame of image, including: performing normal display driving on the n rows of sub-pixels in a display driving period, performing darkness insertion driving on b rows, from the 1st to bth rows, of sub-pixels in a first darkness insertion sub-period, and performing darkness insertion driving on (n?b) rows, from the (b+1)th to nth rows, of sub-pixels in a second darkness insertion sub-period.

Abstract: A shift register, a driving method, a driving control circuit and a display device. The method comprises: at a data refresh stage (T10), applying to an input signal end (IP) an input signal having a pulse level, applying a control clock pulse signal to a control clock signal end, and applying a noise reduction clock pulse signal to a noise reduction clock signal end; at a noise reduction holding phase (T21-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a fixed voltage signal to the noise reduction clock signal end; and at a noise reduction enhancement stage (T22-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a clock pulse signal to the noise reduction clock signal end.

Abstract: The present application discloses a pixel array substrate. The pixel array substrate includes a plurality of pixels arranged in an array having multiple data-input terminals. N columns of subpixels per each column of pixels are associated with N sets of M numbers of data lines. N is an integer equal to and greater than 1 and M is an even number equal to or greater than 2. The pixel array substrate also includes N sets of M numbers of switches coupled respectively to the N sets of M numbers of data lines. Control terminals of each set of M numbers of switches are respectively coupled to M numbers of clock-signal terminals to receive respective clock control signals to control M groups of subpixels in each corresponding one column of subpixels for connecting with one of the multiple data-input terminals respectively via each corresponding set of M numbers of data lines.

Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuitry and a display device. The gate driving unit includes a reverse-phase gate driving signal output end, a normal-phase gate driving signal output end, an input circuitry, an output control circuitry, an input node control circuitry and an output circuitry. The input circuitry is configured to control an input end to be electrically connected to an input node under the control of a first clock signal. The output control circuitry is configured to control a potential at an output node under the control of a potential at the input node and a second clock signal. The input node control circuitry is configured to control the potential at the input node in accordance with the potential at the output node under the control of the second clock signal.

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a gate scan driving circuit, a light-emitting control scan driving circuit, and a first power line, the gate scan driving circuit includes a first stabilizing capacitor, a first electrode plate of the first stabilizing capacitor is electrically connected to the output terminal of the gate scan driving circuit; and the light-emitting control scan driving circuit includes a second stabilizing capacitor, a first electrode plate of the second stabilizing capacitor is electrically connected to the output terminal, a second electrode plate of the second stabilizing capacitor is electrically connected to the first power line, the second electrode plate of the second stabilizing capacitor includes a first part and a second part, and an organic insulation layer is provided between the first part and the second part.

Abstract: Disclosed is a shift register unit, including a first input circuit, an input control circuit, a pull-down control circuit, a pull-down circuit, an output circuit and a second input circuit. The first input circuit includes a first input sub-circuit, and is configured to, under control of the first signal input terminal, cause a voltage of the first voltage terminal to be output to a second terminal of the first input sub-circuit and output to the pull-up node via a first terminal thereof. The input control circuit is configured to pull down a potential of the second terminal to the potential of a first power supply voltage terminal under control of an enable signal terminal.

Abstract: A shift register circuit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a discharge sub-circuit and a noise reduction sub-circuit. The input sub-circuit is connected to an input signal terminal, a first power source terminal and a pull-down node, and configured to, under the control of an input signal, output a first power source terminal signal to the pull-down node. In the shift register circuit, the discharge sub-circuit may control the potential of the pull-down node to be an ineffective potential at the input stage, thereby preventing the noise reduction sub-circuit from affecting the potentials of the pull-up node and the output terminal under the control of the pull-down node, and ensuring normal output of the shift register circuit.

Abstract: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.

Abstract: The present application discloses a gate driver on array (GOA) circuit of a display panel. The GOA circuit includes a first GOA unit comprising a unit-circuitry structure having a pull-up node commonly coupled to three output transistors to control outputting of a first set of three gate-driving signals respectively to a first set of three gate lines associated with the display panel. The GOA circuit additionally includes a second GOA unit comprising a substantially same unit-circuitry structure cascaded with the first GOA unit and configured to control outputting a second set of three gate-driving signals respectively to a second set of three gate lines associated with the display panel. Moreover, the GOA circuit includes a capacitor connected from one in the second set of three output terminals of the second GOA unit to the pull-up node of the first GOA unit.