Patents by Inventor Xing Zhang
Xing Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12156437Abstract: An organic light-emitting diode (OLED) display substrate, a manufacturing method thereof and a display panel are provided. The OLED display substrate has pixel regions and includes a base substrate and a pixel defining layer disposed on the base substrate; in regions of the pixel defining layer corresponding to the pixel regions, accommodation parts penetrating the pixel defining layer are disposed, and the pixel defining layer is further provided with guide parts disposed corresponding to the accommodation parts, the guide parts are located on a periphery of the corresponding accommodation parts and formed by recessed areas which are formed on a side of the pixel defining layer away from the base substrate, the recessed areas do not penetrate the pixel defining layer, and an orthographic projection of the guide part on the base substrate is directly coupled to an orthographic projection of the corresponding accommodation part on the base substrate.Type: GrantFiled: December 13, 2023Date of Patent: November 26, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Guoying Wang, Zhen Song, Yicheng Lin, Xing Zhang, Pan Xu, Ling Wang, Ying Han
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Patent number: 12149184Abstract: A multi-mode control method for a grid-connected inverter includes: continuously calculating an effective value VHarRms of a voltage harmonic of a filtering capacitor; perturbing a control parameter to excite the voltage harmonic of the filtering capacitor; estimating a grid condition based on the perturbed control parameter and the effective value VHarRms of the voltage harmonic of the filtering capacitor; and switching a control mode of the grid-connected inverter based on the estimated grid condition. The multi-mode control method provides a grid condition detection method, which excites the voltage harmonic by perturbing the control parameter and determines the grid condition by the relationship between the control parameter and the effective value of the voltage harmonic.Type: GrantFiled: June 26, 2024Date of Patent: November 19, 2024Assignee: HEFEI UNIVERSITY OF TECHNOLOGYInventors: Xing Zhang, Feng Han, Xiangdui Zhan, Yu Xiao, Xinxin Fu
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Publication number: 20240376598Abstract: Provided herein are systems and methods for semiconductor processing including feature fill processes. The methods comprise providing a substrate having a feature to be filled with a metal in a chamber, and flowing a metal precursor and a reducing agent into the chamber to deposit metal in the feature in a chemical vapor deposition (CVD) operation, wherein the CVD operation comprises a ramp down stage in which the flow rate of the metal precursor into the chamber is ramped down from a first flow rate to a second flow rate. or a ramp up stage in which the flow rate of the metal precursor into the chamber is ramped up from the first flow rate to the second flow rate.Type: ApplicationFiled: September 6, 2022Publication date: November 14, 2024Inventors: Jasmine LIN, Anand CHANDRASHEKAR, Gang LIU, Xing ZHANG, Kaihan Abidi ASHTIANI
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Patent number: 12136117Abstract: A computing system generates recommendations for users within the context of a network service. To account for objectives of various users associated with the network service, some of which may not reach optimality at the same time, the computing system generates values associated with each of the objectives separately. For example, for each objective, the system may train a computer model to produce a representative value. To generate a recommendation of an entity for a user, the system uses the generated objective values as inputs to an optimization algorithm. The optimization step may use linear programming or quadratic programming to generate a recommendation score, for example. This two-step process allows the system to account for multiple objectives and makes the system easily adaptable to change when the set of objectives is updated.Type: GrantFiled: August 27, 2021Date of Patent: November 5, 2024Assignee: Uber Technologies, Inc.Inventors: Yuyan Wang, Xian Xing Zhang, Isaac Suyu Liu, Yuanchi Ning, Chen Peng
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Patent number: 12133428Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a light-shielding layer. The base substrate includes a display region including repeating units, each repeating unit includes a transparent region and a pixel region, the pixel region includes sub-pixels, each sub-pixel includes a sub-pixel driving circuit and a light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting layer located between the first electrode and the second electrode. The light-shielding layer is located on a side of the sub-pixel driving circuit close to the base substrate, at least part of an orthographic projection of the light-shielding layer on a main surface of the base substrate overlaps with an orthographic projection of the sub-pixel driving circuit on the main surface of the base substrate, and the light-shielding layer is connected with the second electrode.Type: GrantFiled: March 25, 2021Date of Patent: October 29, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xing Zhang, Zhan Gao, Yicheng Lin, Pan Xu, Ying Han, Guoying Wang, Dacheng Zhang
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Publication number: 20240356427Abstract: A cascaded power conversion system is used for receiving an AC input power having an AC input voltage. The cascaded power conversion system includes N power conversion modules. Each of the N power conversion modules includes an AC/DC conversion unit, a DC bus and a DC/DC conversion unit. In every ΒΌ period of the AC input voltage, the DC/DC conversion units of the N power conversion modules are operated in a bypass mode, a boost mode and a hold mode, and a total voltage of DC bus voltages of the N power conversion modules are changed in a consecutive manner.Type: ApplicationFiled: April 12, 2024Publication date: October 24, 2024Inventors: Hong Liu, Yuxin Han, Wen Zhang, Weiqiang Zhang, Junshan Lou, Xing Zhang
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Patent number: 12127454Abstract: A display substrate includes: a base substrate, a plurality of pixel units and a plurality of initialization voltage signal lines. The pixel units are arranged in an array to form a plurality of rows of pixel units and a plurality of columns of pixel units, at least one pixel unit includes sub-pixels, and at least one sub-pixel includes a light-emitting element and a pixel driving circuit. The initialization voltage signal lines are configured to provide initialization voltage signals to the plurality of rows of pixel units respectively, and are arranged at intervals along a second direction. At least one initialization voltage signal line extends along a first direction. The plurality of rows of pixel units include a (2n?1)th row and a 2nth row and pixel driving circuits of the (2n?1)th row and pixel driving circuits of the 2nth rows share a common initialization voltage signal line.Type: GrantFiled: September 6, 2022Date of Patent: October 22, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Ying Han, Pan Xu, Xing Zhang, Chengyuan Luo, Donghui Zhao, Mingi Chu
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Publication number: 20240349489Abstract: Examples of the present application provide a semiconductor device, a memory system and a fabrication method of a semiconductor device. The semiconductor device includes: a silicon contact structure; a metal silicide layer on one side of the silicon contact structure; a bit line structure located on the side of the metal silicide layer away from the silicon contact structure and extending in a first direction; and a sidewall structure covering the opposite sides of the bit line structure and the opposite sides of the metal silicide layer in the first direction and extending further to cover the opposite sides, in the first direction, of the first end of the silicon contact structure proximate to the metal silicide layer.Type: ApplicationFiled: July 27, 2023Publication date: October 17, 2024Inventors: Zhaoyun TANG, Zhi ZHANG, Zhongwei LUO, WenYu HUA, He CHEN, Xing ZHANG, Yugang WU
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Publication number: 20240334763Abstract: A display panel and a display device are provided, the display panel has a display region, a dummy pixel region and a circuit region, the display region a planarization layer and an encapsulation layer. The circuit region includes a plurality of wires and a frame sealant. The frame sealant overlaps with at least a part of the wires, the encapsulation layer overlaps with at least a part of the frame sealant. The planarization layer includes at least one groove in the circuit region, and overlapping with at least a part of the wires. A first side and a second side of the display region include a binding region, and at least one first chip-on-film in the first binding region on the first side and at least one second chip-on-film in the second binding region on the second side are centrosymmetric with respect to a center of the display region.Type: ApplicationFiled: October 28, 2021Publication date: October 3, 2024Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xing ZHANG, Pan XU, Dacheng ZHANG, Ying HAN, Guoying WANG, Yi CHEN
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Patent number: 12104882Abstract: Skin-core structure fibers with both infrared and radar stealth, a preparation method therefor, and the use thereof are provided. The fibers are as follows: a core material of the skin-core structure fibers comprises the following raw materials in parts by weight: 10 parts of paraffin; 0.7-1.5 parts of an electromagnetic wave absorbent; and 1 part of a high-molecular polymer, wherein the electromagnetic wave absorbent is one or more of ferroferric oxide-intercalated graphene oxide, nano ferroferric oxide and carbon black, and wherein the skin-core structure fiber is obtained by spinning the core material with a skin-layer material.Type: GrantFiled: May 10, 2022Date of Patent: October 1, 2024Assignee: NANTONG UNIVERSITYInventors: Wei Ye, Xing Zhang, Qilong Sun, Xiaoyun Long, Qiang Gao, Tao Ji
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Patent number: 12102960Abstract: The present disclosure discloses a plasma purification device for purifying catering oil fume and a method for purifying catering oil fume, relating to the technical field of atmospheric pollution control. The plasma purification device successively includes in a flow direction of airflow an inlet, a rotary discharge module configured to negatively charge oil fume particulate matter with a particle size between 2 ?m and 50 ?m in the catering oil fume; an electrostatic adsorption module configured to capture negatively charged oil fume particulate matter; a back corona catalytic module configured to treat VOCs in the catering oil fume; and an outlet. The rotary discharge module includes a central rod arranged parallel to the flow direction of airflow and a plurality of barbed corona electrodes arranged around the central rod.Type: GrantFiled: July 19, 2023Date of Patent: October 1, 2024Assignee: SUZHOU UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Xing Zhang, Yubin Chi
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Publication number: 20240324353Abstract: A display panel includes a substrate, an auxiliary electrode, a connection portion, a light-emitting layer and a cathode layer. The connection portion includes a first connection pattern connected to the auxiliary electrode, a second connection pattern, and a third connection pattern that are sequentially stacked. An edge of the second connection pattern is indented inward relative to an edge of the third connection pattern. The light-emitting layer includes a first light-emitting pattern and a second light-emitting pattern. The first light-emitting pattern is located around and separated from the second light-emitting pattern. The second light-emitting pattern is located on a side of the third connection pattern away from the substrate. The cathode layer passes through a gap between the first light-emitting pattern and the second light-emitting pattern to be in electrical contact with the at least one of the first connection pattern, the second connection pattern and the third connection pattern.Type: ApplicationFiled: May 18, 2023Publication date: September 26, 2024Inventors: Ying Han, Pan Xu, Xing Zhang, Chengyuan Luo, Donghui Zhao, Dacheng Zhang
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Publication number: 20240321170Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit includes a fifth transistor.Type: ApplicationFiled: May 28, 2024Publication date: September 26, 2024Applicants: Hefei BOE Joint Technology Co.,Ltd., BOE Technology Group Co., Ltd.Inventors: Xuehuan Feng, Yongqian Li, Xing Zhang
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Publication number: 20240306366Abstract: A semiconductor structure and a method for preparing the same are provided. The semiconductor structure includes: a substrate having a plurality of active regions that are arrayed. Each of the plurality of active regions includes an active portion and an active extension portion. A word line gate structure is positioned in the substrate. The word line gate structure runs through the plurality of active regions. The word line gate structure includes a word line layer and a word line isolation layer. The active extension portion covers a surface of the active portion and is at least partially positioned on the word line gate structure. A word line isolation extension portion is positioned in the active extension portion, where the word line isolation extension portion is connected to the word line isolation layer and formed on a surface of the word line isolation layer.Type: ApplicationFiled: May 20, 2024Publication date: September 12, 2024Applicant: ICLEAGUE Technology Co., Ltd.Inventors: WenYu HUA, FanDong LIU, Kuan HU, Ya WANG, Xing ZHANG
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Publication number: 20240305364Abstract: A Low Earth orbit (LEO) satellite congestion control routing method is disclosed, including: Step 1: A LEO satellite periodically detecting queue lengths of a plurality of ports and informing a Geostationary Earth Orbit (GEO) satellite of queue lengths of congested ports in the plurality of ports; Step 2: The GEO satellite sending the queue lengths of congested ports to a ground station, and a computing center of the ground station calculating link status weights according to the queue lengths of congested ports; Step 3: According to the link status weights, the computing center of the ground station determining a congestion area; Step 4: The computing center of the ground station calculating a routing table of satellites in the congestion area, and the ground station sending the routing table to a LEO satellite inside the congestion area; Step 5: The LEO satellite in the congestion area receiving the routing table, and performing end-to-end transmission of data packets to a destination LEO satellite accordinType: ApplicationFiled: March 8, 2024Publication date: September 12, 2024Inventors: Jiaxin Zhang, Kaiwei Wang, Xing Zhang, Rui Li, Zhaoyang Chang, Yilong Zhang, Hang Lu
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Patent number: 12082436Abstract: The present disclosure provides a display substrate, including: a base substrate, which includes a display region and a driving region arranged on at least one side of the display region; a first electrode layer disposed in the display region; a signal output part disposed in the driving region, the first electrode layer is electrically coupled to the signal output part, the first electrode layer comprises a plurality of electrode regions each having a same area; and a plurality of auxiliary electrodes, which are in one-to-one correspondence with the plurality of electrode regions and configured to be coupled in parallel with the first electrode layer, a resistance of each auxiliary electrode is inversely correlated with a minimum distance from the electrode region corresponding to said each auxiliary electrode to the signal output part. The present disclosure further provides a display panel and a manufacturing method thereof and a display device.Type: GrantFiled: June 2, 2020Date of Patent: September 3, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xing Zhang, Wei Quan, Yicheng Lin, Pan Xu, Ling Wang, Guoying Wang, Ying Han, Zhan Gao
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Publication number: 20240292695Abstract: Light-emitting base plate and method for preparing the same and a light-emitting device is provided, relating to the field of display technology. The light-emitting base plate includes a substrate, a functional layer disposed at one side of the substrate, and a first insulating layer and a first electrode layer stacked at one side of the functional layer away from the substrate, the first insulating layer is located between the functional layer and the first electrode layer; wherein the functional layer includes: a first electrode wiring located at the display area, an electrode signal bus located at the frame area, and an electrode signal leading wire connecting the first electrode wiring and the electrode signal bus; the first electrode layer is connected to the first electrode wiring by a first via hole provided at the first insulating layer.Type: ApplicationFiled: May 31, 2022Publication date: August 29, 2024Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Xing Zhang, Pan Xu, Ying Han, Chengyuan Luo, Donghui Zhao
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Patent number: 12075664Abstract: A display substrate having a plurality of subpixels is provided. A respective one of the plurality of subpixels includes a light emitting element; a first thin film transistor configured to driving light emission of the light emitting element; and a light emitting brightness value detector. The light emitting brightness value detector includes a second thin film transistor; and a photosensor electrically connected to the second thin film transistor and configured to detect a light emitting brightness value. The display substrate further includes a silicon organic glass layer on a side of at least one of the first thin film transistor or the second thin film transistor away from a base substrate; and the photosensor is on a side of the silicon organic glass layer away from the base substrate.Type: GrantFiled: November 4, 2019Date of Patent: August 27, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Guoying Wang, Yicheng Lin, Ling Wang, Zhen Song, Pan Xu, Xing Zhang, Ying Han, Zhan Gao
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Publication number: 20240283720Abstract: An abnormal recording system and the method for network gateway are related to the abnormal recording system including an external server and a gateway. The gateway includes a network interface, a storage unit, and a processing unit. The processing unit connects to the network interface and the storage unit. The network interface connects to the external server. The storage unit stores an abnormal log file. When the processing unit detects an abnormal status, the processing unit generates the abnormal log file according to the abnormal status, and in the booting state, sends the abnormal log file stored in the storage unit to the external server by the network interface.Type: ApplicationFiled: May 22, 2023Publication date: August 22, 2024Applicant: REALTEK SEMICONDUCTOR CORP.Inventors: Peng Tang, Xing Zhang
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Publication number: 20240280862Abstract: The present disclosure provides a liquid crystal grating and a driving method therefor, and a three-dimensional (3D) display device. The liquid crystal grating includes: a first substrate; a second substrate, where the second substrate and the first substrate are oppositely arranged; a liquid crystal layer, where the liquid crystal layer is located between the first substrate and the second substrate; and a first transparent grating electrode layer located at a side, facing the liquid crystal layer, of the first substrate; where the first transparent grating electrode layer includes a plurality of first strip-shaped electrodes extending in a first direction and arranged at intervals in a second direction, and each of at least part of the first strip-shaped electrodes is divided in the first direction into at least two first strip-shaped sub-electrodes arranged independently.Type: ApplicationFiled: April 26, 2022Publication date: August 22, 2024Inventors: Yonggang ZHANG, Wei ZHANG, Chao LI, Xipeng WANG, Jilei GAO, Xin ZHOU, Benzhi XU, Qi LIU, Liangwei ZHANG, Xing ZHANG