Abstract: The present application discloses calibration system and method for an electric field probe and a magnetic field probe based on multiple components. The system includes a microstrip line calibration assembly, a clamp, a vector network analyzer and a data processing unit; two groups of microstrip lines included in the microstrip line calibration assembly can be distributed on different routing layers of the same PCB board or on independent PCB boards; the first group of microstrip lines is single microstrip lines or differential lines under common mode excitation, which are used to generate a main component Hy of a magnetic field, and the second group of microstrip lines is differential lines under differential mode excitation, which are used to generate a main component Ex of an electric field.

Abstract: The present application provides an interposer, including an interposer substrate, at least one through silicon via, a first shield layer, a first insulation layer, a first cable layout layer, and at least one first bump. The interposer substrate includes an upper surface and a lower surface; the at least one through silicon via is buried in the interposer substrate and runs through the upper surface and the lower surface; the first shield layer is disposed on the upper surface of the interposer substrate and the first shield layer has electrical conductivity; the first insulation layer is disposed at the first shield layer; the first cable layout layer is disposed at the first insulation layer and is electrically connected to the at least one through silicon via.

Abstract: The present application provides an interposer, including an interposer substrate, at least one through silicon via, a first shield layer, a first insulation layer, a first cable layout layer, and at least one first bump. The interposer substrate includes an upper surface and a lower surface; the at least one through silicon via is buried in the interposer substrate and runs through the upper surface and the lower surface; the first shield layer is disposed on the upper surface of the interposer substrate and the first shield layer has electrical conductivity; the first insulation layer is disposed at the first shield layer; the first cable layout layer is disposed at the first insulation layer and is electrically connected to the at least one through silicon via.