Patents by Inventor Xingcheng Jin

Xingcheng Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deep trench isolation for RF devices on SOI
    Patent number: 10074650
    Abstract: A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The semiconductor device also includes a plurality of transistors on the second semiconductor substrate, a deep trench isolation having a bottom at a surface of the first semiconductor substrate in the second region, the deep trench isolation exposing a sidewall of the second semiconductor substrate and a sidewall of the buried insulating layer, and a dielectric capping layer filling the deep trench isolation and covering the plurality of transistors on the second semiconductor substrate.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: September 11, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Herb He Huang, Haiting Li, Xingcheng Jin, Xinxue Wang, Hongbo Zhao, Fucheng Chen, Yanghui Xiang
  • METHOD FOR FORMING DEEP TRENCH ISOLATION FOR RF DEVICES ON SOI
    Publication number: 20170287908
    Abstract: A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.
    Type: Application
    Filed: May 3, 2016
    Publication date: October 5, 2017
    Inventors: HERB HE HUANG, HAITING LI, XINGCHENG JIN, XINXUE WANG, HONGBO ZHAO, FUCHENG CHEN, YANGHUI XIANG
  • METHOD FOR FORMING DEEP TRENCH ISOLATION FOR RF DEVICES ON SOI
    Publication number: 20160247801
    Abstract: A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.
    Type: Application
    Filed: May 3, 2016
    Publication date: August 25, 2016
    Inventors: HERB HE HUANG, HAITING LI, XINGCHENG JIN, XINXUE WANG, HONGBO ZHAO, FUCHENG CHEN, YANGHUI XIANG
  • Method for forming deep trench isolation for RF devices on SOI
    Patent number: 9349748
    Abstract: A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: May 24, 2016
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Herb He Huang, Haiting Li, Xingcheng Jin, Xinxue Wang, Hongbo Zhao, Fucheng Chen, Yanghui Xiang
  • METHOD FOR FORMING DEEP TRENCH ISOLATION FOR RF DEVICES ON SOI
    Publication number: 20150187794
    Abstract: A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.
    Type: Application
    Filed: December 8, 2014
    Publication date: July 2, 2015
    Inventors: Herb He Huang, Haiting Li, Xingcheng Jin, Xinxue Wang, Hongbo Zhao, Fucheng Chen, Yanghui Xiang